Intel® Server System Server System "Emerald Ridge ... - CTL

錯 誤 ! 尚 未 定 義 樣 式 。 EPSFunctional Specification06hPower unit failure – Asserted for the following conditions:Unexpected deassertion of system POWER_GOOD signal.System fails to respond to any power control source’s attempt to power downthe system.System fails to respond to any hardware power control source’s attempt topower on the system.Power Distribution Board (PDB) failure is detectedAssertion andDeassertion3.28.1.1 Power OffThe BMC asserts the Power Off offset whenever the system DC power is off.3.28.1.2 AC LostThe BMC asserts the AC lost offset when AC power is applied to the system and the previoussystem power state was on. This offset is for event generation only and does not remainasserted.3.28.1.3 Soft Power Control FaultThe BMC asserts the Soft Power Control Failure offset if the system fails to power-on within 8seconds as instructed by the following power control sources:Chassis control commandBMC watchdog timerPower state retentionThe BMC provides system status indication via the front panel LEDs. See Section 3.6.2. TheBMC generates a beep code for Power Control Fault. See Table 8.3.28.1.4 Power Unit FailureThe BMC asserts the Power Unit Failure offset of the Power Unit sensor for the followingsituations: Power-good dropout (see Section 3.1.2).The system fails to power down: The POWER_GOOD signal fails to transition to the deassertedstate within 1 second when any of the enabled power control sources attempt totransition the system to the power-off state.The system fails to power-on due to any enabled hardware power control source: ThePOWER_GOOD signal from the power sub-system fails to assert within 8 seconds inresponse to a chipset or front panel power button request to power on.The BMC provides system status indication via the front panel LEDs as described in Section3.6.2. The BMC generates a beep code for a power fault. See Table 8.A power distribution board (PDB) failure is detected.Revision 1.1Intel ® Confidential 45