Intel® Server System Server System "Emerald Ridge ... - CTL

錯 誤 ! 尚 未 定 義 樣 式 。Intel® Server System "Emerald Ridge” Integrated Baseboard Management Controller EPSThe Vitesse SEPs support the legacy BMC to SCSI Enclosure Processor (SEP) commands thatwere implemented on earlier server boards that used a Qlogic* GEM 424. These are supportedvia the IPMB interface. These commands are augmented with new commands capable ofsupporting up to 32 drives.3.36 LAN Leash Event MonitoringThe Physical Security sensor is used to monitor the LAN link and chassis intrusion status. Thisis implemented as a LAN Leash offset in this discrete sensor. This sensor monitors the link stateof the two BMC embedded LAN channels. It does not monitor the state of any optional NICs.The LAN Leash Lost offset asserts when one of the two BMC LAN channels loses a previouslyestablished link. It deasserts when at least one LAN channel has a new link established afterthe previous assertion. No action is taken if a link has never been established.LAN Leash events do not affect the front-panel system status LED.3.37 CATERR ReportingThe BMC supports a CATERR sensor for monitoring the system CATERR signal.The CATERR signal is defined as having 3 states; High (no event)Pulsed low (degraded)Low (fatal)All processors in a system have their CATERR pins tied together. The pin is used as acommunication path to signal a catastrophic system event to all CPUs. The BMC has directaccess to this aggregate CATERR signal.The BMC only monitors for the “CATERR held low” condition. A pulsed low condition is ignoredby the BMC.If a CATERR-low condition is detected, the BMC logs an error message to the SEL against theCATERR sensor. The BMC logs a SEL entry, and resets the system. Because the CATERRsignals are tied together, the BMC is unable to determine which processor caused the CATERRevent.The sensor is rearmed on power-on (AC or DC power on transitions). It is not rearmed onsystem resets to avoid multiple SEL events that could occur due to a potential reset loop if theCATERR keeps recurring, which would be the case if the CATERR was due to an MSIDmismatch condition.3.38 CMOS Battery MonitoringThe BMC monitors the voltage level from the CMOS battery; which provides battery backup tothe chipset RTC. This is monitored as an auto-rearm threshold sensor. See the “BB VBat”sensor in Table 88.54Intel ConfidentialRevision 1.1