Preliminary C8051F120/1/2/3 C8051F124/5/6/7 - KEMT FEI TUKE

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C8051F120/1/2/3 C8051F124/5/6/7 Preliminary SYSCLK from Internal Osc. SYSCLK from External Osc. SYSCLK from Internal Osc. Table 22.1. Timer Settings for Standard Baud Rates Using The Internal Oscillator Frequency: 24.5 MHz Target Baud Rate (bps) Baud Rate %Error Oscillator Divide Factor Timer Clock Source SCA1-SCA0 T1M † Timer 1 (pre-scale select) † Reload Value (hex) 230400 -0.32% 106 SYSCLK XX 1 0xCB 115200 -0.32% 212 SYSCLK XX 1 0x96 57600 0.15% 426 SYSCLK XX 1 0x2B 28800 -0.32% 848 SYSCLK / 4 01 0 0x96 14400 0.15% 1704 SYSCLK / 12 00 0 0xB9 9600 -0.32% 2544 SYSCLK / 12 00 0 0x96 2400 -0.32% 10176 SYSCLK / 48 10 0 0x96 1200 0.15% 20448 SYSCLK / 48 10 0 0x2B X=Don’tcare † SCA1-SCA0 and T1M bit definitions can be found in Section 23.1. Table 22.2. Timer Settings for Standard Baud Rates Using an External Oscillator Frequency: 25.0 MHz Target Baud Rate (bps) Baud Rate %Error Oscillator Divide Factor Timer Clock Source SCA1-SCA0 T1M † Timer 1 (pre-scale select) † Reload Value (hex) 230400 -0.47% 108 SYSCLK XX 1 0xCA 115200 0.45% 218 SYSCLK XX 1 0x93 57600 -0.01% 434 SYSCLK XX 1 0x27 28800 0.45% 872 SYSCLK / 4 01 0 0x93 14400 -0.01% 1736 SYSCLK / 4 01 0 0x27 9600 0.15% 2608 EXTCLK / 8 11 0 0x5D 2400 0.45% 10464 SYSCLK / 48 10 0 0x93 1200 -0.01% 20832 SYSCLK / 48 10 0 0x27 57600 -0.47% 432 EXTCLK / 8 11 0 0xE5 28800 -0.47% 864 EXTCLK / 8 11 0 0xCA 14400 0.45% 1744 EXTCLK / 8 11 0 0x93 9600 0.15% 2608 EXTCLK / 8 11 0 0x5D X=Don’tcare † SCA1-SCA0 and T1M bit definitions can be found in Section 23.1. Page 272 DS008-0.8-AUG02 © 2002 Cygnal Integrated Products, Inc.
Preliminary C8051F120/1/2/3 C8051F124/5/6/7 SYSCLK from External Osc. SYSCLK from Internal Osc. Table 22.3. Timer Settings for Standard Baud Rates Using an External Oscillator Frequency: 22.1184 MHz Target Baud Rate (bps) Target Baud Rate (bps) Baud Rate %Error Oscillator Divide Factor Timer Clock Source SCA1-SCA0 T1M † Timer 1 (pre-scale select) † Reload Value (hex) 230400 0.00% 96 SYSCLK XX 1 0xD0 115200 0.00% 192 SYSCLK XX 1 0xA0 57600 0.00% 384 SYSCLK XX 1 0x40 28800 0.00% 768 SYSCLK / 12 00 0 0xE0 14400 0.00% 1536 SYSCLK / 12 00 0 0xC0 9600 0.00% 2304 SYSCLK / 12 00 0 0xA0 2400 0.00% 9216 SYSCLK / 48 10 0 0xA0 1200 0.00% 18432 SYSCLK / 48 10 0 0x40 230400 0.00% 96 EXTCLK / 8 11 0 0xFA 115200 0.00% 192 EXTCLK / 8 11 0 0xF4 57600 0.00% 384 EXTCLK / 8 11 0 0xE8 28800 0.00% 768 EXTCLK / 8 11 0 0xD0 14400 0.00% 1536 EXTCLK / 8 11 0 0xA0 9600 0.00% 2304 EXTCLK / 8 11 0 0x70 X=Don’tcare † SCA1-SCA0 and T1M bit definitions can be found in Section 23.1. Table 22.4. Timer Settings for Standard Baud Rates Using the PLL Frequency: 50.0 MHz Baud Rate %Error Oscillator Divide Factor Timer Clock Source SCA1-SCA0 T1M † Timer 1 (pre-scale select) † Reload Value (hex) 230400 0.45% 218 SYSCLK XX 1 0x93 115200 -0.01% 434 SYSCLK XX 1 0x27 57600 0.45% 872 SYSCLK / 4 01 0 0x93 28800 -0.01% 1736 SYSCLK / 4 01 0 0x27 14400 0.22% 3480 SYSCLK / 12 00 0 0x6F 9600 -0.01% 5208 SYSCLK / 12 00 0 0x27 2400 -0.01% 20832 SYSCLK / 48 10 0 0x27 X = Don’t care † SCA1-SCA0 and T1M bit definitions can be found in Section 23.1. © 2002 Cygnal Integrated Products, Inc. DS008-0.8-AUG02 Page 273
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