Preliminary C8051F120/1/2/3 C8051F124/5/6/7 - KEMT FEI TUKE

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C8051F120/1/2/3 C8051F124/5/6/7 Preliminary Figure 25.6. FLASHADR: JTAG Flash Address Register Bit16 Bit0 Reset Value 0x00000 This register holds the address for all JTAG Flash read, write, and erase operations. This register autoincrements after each read or write, regardless of whether the operation succeeded or failed. Bits15-0: Flash Operation 17-bit Address. Figure 25.4. FLASHDAT: JTAG Flash Data Register Bit9 Bit0 Reset Value 0000000000 This register is used to read or write data to the Flash memory across the JTAG interface. Bits9-2: Bit1: Bit0: DATA7-0: Flash Data Byte. FAIL: Flash Fail Bit. 0: Previous Flash memory operation was successful. 1: Previous Flash memory operation failed. Usually indicates the associated memory location was locked. BUSY:FlashBusyBit. 0: Flash interface logic is not busy. 1: Flash interface logic is processing a request. Reads or writes while BUSY = 1 will not initiate another operation Page 310 DS008-0.8-AUG02 © 2002 Cygnal Integrated Products, Inc.
Preliminary C8051F120/1/2/3 C8051F124/5/6/7 Figure 25.5. FLASHSCL: JTAG Flash Scale Register Reset Value - - FLRT Reserved Reserved Reserved FLWE 10000000 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Bits 7-6: Unused. Bits 5-4: FLRT: FLASH Read Time. These bits should be programmed to the smallest allowed value, according to the system clock speed. 00: SYSCLK
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Preliminary C8051F120/1/2/3 C8051F124/5/6/7 - KEMT FEI TUKE

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