Preliminary C8051F120/1/2/3 C8051F124/5/6/7 - KEMT FEI TUKE

C8051F120/1/2/3
C8051F124/5/6/7
Preliminary
8.1.2. Update Output Based on Timer Overflow.............................................................98
8.2. DAC Output Scaling/Justification...................................................................................98
9. VOLTAGE REFERENCE (C8051F120/2/4/6) .................................................................105
10. VOLTAGE REFERENCE (C8051F121/3/5/7) .................................................................107
11. COMPARATORS................................................................................................................109
12. CIP-51 MICROCONTROLLER........................................................................................117
12.1.Instruction Set................................................................................................................118
12.1.1. Instruction and CPU Timing................................................................................118
12.1.2. MOVX Instruction and Program Memory...........................................................118
12.2.Memory Organization ...................................................................................................123
12.2.1. Program Memory.................................................................................................123
12.2.2. Data Memory .......................................................................................................125
12.2.3. General Purpose Registers ...................................................................................125
12.2.4. Bit Addressable Locations ...................................................................................125
12.2.5. Stack .................................................................................................................125
12.2.6. Special Function Registers...................................................................................126
12.2.6.1.SFR Paging..................................................................................................126
12.2.6.2.Interrupts and SFR Paging...........................................................................126
12.2.6.3.SFR Page Stack Example ............................................................................128
12.2.7. Register Descriptions...........................................................................................141
12.3.Interrupt Handler ...........................................................................................................144
12.3.1. MCU Interrupt Sources and Vectors ...................................................................144
12.3.2. External Interrupts ...............................................................................................144
12.3.3. Interrupt Priorities................................................................................................146
12.3.4. Interrupt Latency..................................................................................................146
12.3.5. Interrupt Register Descriptions............................................................................147
12.4.Power Management Modes ...........................................................................................153
12.4.1. Idle Mode.............................................................................................................153
12.4.2. Stop Mode............................................................................................................153
13. RESET SOURCES ..............................................................................................................155
13.1.Power-on Reset..............................................................................................................156
13.2.Power-fail Reset ............................................................................................................156
13.3.External Reset................................................................................................................156
13.4.Missing Clock Detector Reset.......................................................................................157
13.5.Comparator0 Reset ........................................................................................................157
13.6.External CNVSTR0 Pin Reset.......................................................................................157
13.7.Watchdog Timer Reset..................................................................................................157
13.7.1. Enable/Reset WDT ..............................................................................................157
13.7.2. Disable WDT .......................................................................................................158
13.7.3. Disable WDT Lockout.........................................................................................158
13.7.4. Setting WDT Interval...........................................................................................158
14. OSCILLATORS...................................................................................................................161
14.1.Programmable Internal Oscillator .................................................................................161
14.2.External Oscillator Drive Circuit...................................................................................163
14.3.System Clock Selection.................................................................................................163
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DS008-0.8-AUG02 © 2002 Cygnal Integrated Products, Inc.