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Advanced POWER Virtualization on IBM System p5 - Previous ...

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Logical<br />

CPU0<br />

Logical<br />

CPU1<br />

Hardware<br />

Thread 0<br />

PURR 0<br />

Hardware<br />

Thread 1<br />

PURR 1<br />

Timebase register<br />

Decrementer<br />

<str<strong>on</strong>g>POWER</str<strong>on</strong>g>5 processor core<br />

Figure 5-24 Per-thread PURR<br />

At each processor clock cycle, <strong>on</strong>e of the PURRs is incremented, either:<br />

► The thread dispatching instructi<strong>on</strong>s<br />

► The thread that last dispatched an instructi<strong>on</strong><br />

The sum of the two PURRs equals the value in the timebase register. This<br />

approach is an approximati<strong>on</strong>, as SMT allows both threads to run in parallel. It<br />

simply provides a reas<strong>on</strong>able indicati<strong>on</strong> of which thread is making use of the<br />

<str<strong>on</strong>g>POWER</str<strong>on</strong>g>5 resources; however, it does not provide a mechanism to distinguish<br />

the performance difference operating with SMT <strong>on</strong> from that with SMT off.<br />

New PURR-based metrics<br />

The new registers provide some new statistics.<br />

SMT statistics<br />

The ratio of (delta PURR)/(delta timebase) over an interval indicates the fracti<strong>on</strong><br />

of physical processor c<strong>on</strong>sumed by a logical processor. This is the figure<br />

returned by the sar -P ALL and mpstat commands.<br />

The figure (delta PURR/delta TB)*100 over an interval gives the previous figure<br />

as a percentage and can be interpreted as the percentage of dispatch cycles<br />

given to a logical processor or the percentage of physical processor c<strong>on</strong>sumed<br />

by a logical processor. This figure is returned by the mpstat -s command, which<br />

shows the SMT statistics.<br />

Chapter 5. <strong>System</strong> management 323

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