Third Day Poster Session, 17 June 2010 - NanoTR-VI

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Poster Session, Thursday, June 17
Theme F686 - N1123
Graphene Field Effective Transistor(FET)
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USelda SonuenUP P*, Selin ManukyanP P, Nihan ÖzkanP P, Hidayet ÇetinP Ahmet OralP
1
PFaculty of Engineering & Natural Sciences, Sabanc University, Istanbul, 34956, Turkey
2
PDepartment of Physics, Boaziçi University, 34342, Turkey
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PDepartment of Physics Engineering, Istanbul Technical University, 34469, Turkey
4
PDepartment of Physics, Bozok University, Yozgat, Turkey
2
Abstract- A graphene field effect transistor was fabricated on a 35×9 μmP P few layer graphene sheet by ‘manolithography’, manually
applying the drain and source contacts using silver paint and using the silicon substrate as back gate. We investigated electrical properties of
this graphene FET device.
1
Graphene is a mono layer of sp² bonded carbon atoms
packed into a two-dimensional (2D) honeycomb lattice.
Since it was known that two dimensional crystals were
thermodynamically unstable, it was presumed that
graphene didn't exist in the free state. However, graphene
was first prepared via mechanical exfoliation of graphite
crystals by Professor Andrew Geim's research group at the
University of Manchester [1].
Even though graphene is the thinnest material ever
fabricated, it has remarkable electrical properties[1]. At the
room temperature, it’s mobility is reported between
2 1 1
15,000- 40,000 cmP
Pand its electrical resistivity is
6
approximately 10P Because of its potential in
electronics applications, it has recently attracted a lot of
the attention of the scientific community [2].
In this work, we fabricated a graphene FET using silver
paints as drain and source contacts under optical
microscope as shown in Figure 1 and Figure 2, for
electrical characterization of graphene. The graphene is
found to be multilayer from Raman Spectrum obtained
directly on the channel. Then, we obtained I-V curves as
shown in Figure 3 and Figure 4 using Keithley 2612
Sourcemeter and the LabTracer 2.0 software. We
calculated the transistor parameters from these data.
Figure 3. I-V curves of graphene based FET.VRGR= -20/20 V
(5 steps) with compliance of 0,01 A.
Figure 4. IRDR
versus VRGSR curveof graphene FET device.
Figure 1. Optical microscope image of graphene with
magnification x50.
This work is supported by TÜBTAK , Project Numbers
107T720, 107T892 & 108T930, Ministry of Industry &
Commerce, Project Number 410.STZ.2009-1 and
NanoMagnetics Instruments Ltd.
*Corresponding author: ssonusen@su.sabanciuniv.edu
[1] Geim, A-K., and Novoselov, K-S.,.The rise of graphene,
Nature Materials, 6, 183-191(2007)
[2]Shishir, R-S., and Ferry, D.K.,. Intrinsic mobility in graphene,
J. Phys., 21, 232204(2009)
Figure 2. The device layout of graphene FET.
6th Nanoscience and Nanotechnology Conference, zmir, 2010 649