Automatic control function programming manual ladder language

3.7.3.2 Card Status %Irc3C.W
Variables
This word informs the user of the internal status of the card. This functionality is available only on the 32I/24O cards
and 32-24 I/O, 64-48 I/O extension cards of the machine operator panel.
Register %Irc3C.W has the following format:
Bit 15
Internal card fault Short-circuit/Power supply fault
If no fault is detected, this register contains 0x00FF.
The internal card status is checked periodically. The programmer can set the period by function DIAGIQ().
If a problem is detected, the register is no longer updated. The user must force the register to 0x00FF to restart update.
REMARK If an internal card fault is detected then the general I/O card error bit %R97F.2
(DEFCARTE) is set.
3.7.3.3 Dialogue Error Counter %Irc3A.W
This word is incremented whenever a link error or card error is detected when polling a card. This counter is blocked
at 0x7FFF.
3.7.3.4 Bus Status %Irc39.B
This byte informs the user of the status of the serial I/O bus link:
- 0 operation OK,
- 1 no echo frame,
- 2 check-sum error on echo frame,
- 3 no response frame,
- 4 check-sum error on response frame,
- 5 optical fibre cut,
- 6 other errors.
The card internal fault bits include the input line fault bits and output line fault bits (refer to the detailed description for
each card supporting this functionality).
If the input link bits are set, the state of the corresponding power supply fault bits is not significant.
If the output link bits are set, the state of the corresponding short circuit fault bits is not significant.
REMARK If four consecutive transmission errors occur on the same card, the general serial
I/O bus link fault bit %R97F.0 (DEFBUS) is set and the watchdog is reset.
If the transmission errors occur during machine processor initialisation, the general
serial I/O bus link fault bit %R97F.0 (DEFBUS) is set and the watchdog is not set.
If the transmission errors occur during a CPU reset, the general serial I/O bus link fault
bit M97F.0 (DEFBUS) is set and the watchdog is disabled.
Bit 0
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