PPKE ITK PhD and MPhil Thesis Classes

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Chapter 1 Introduction Due to the rapid evolution of computer technology the problems on many processing elements, which are arranged in regular grid structures (array processors), become important. With the large number of the processor cores not only the speed of the cores but their topographic structure becomes an important issue. These processors are capable of running multiple tasks in parallel. In order to make an efficiently executed algorithm, the relative distance between two neighboring processing elements should be taken into consideration. In other words it is the precedence of locality phenomenon. This discipline requires the basic operations to be redesigned in order to work on these hardware architectures efficiently. In the dissertation solutions for solving hard computational problems are searched, where the area and dissipated power is minimal, the number of implemented processor, the speed and the memory access are maximal. A solution is searched within this parameter space for an implementation of a partial differential equation, and the solution is optimized for some variable of this parameter space (e.g.: speed, area, bandwidth). The search space will be always limited by the special properties of the hardware environment. There are several known problems, which cannot be computed in real time with the former resources, or just very slowly. The aim of the research is the examination of these hard problems. As an example a fluid flow simulation is going to be analyzed, and a hardware implementation for the problems is going to be introduced. 1
Page 1: An Optimal Mapping of Numerical Sim
Page 5 and 6: Acknowledgements It is not so hard
Page 7 and 8: Contents 1 Introduction 1 1.1 Cellu
Page 9: CONTENTS iii 4.3.3 Operating Steps
Page 12 and 13: vi LIST OF FIGURES 2.4 Performance
Page 15: List of Tables 2.1 Comparison of di
Page 18 and 19: xii LIST OF ABBREVIATIONS FPE Falco
Page 22 and 23: 2 1. INTRODUCTION The motivation of
Page 24 and 25: 4 1. INTRODUCTION 1.1 Cellular Neur
Page 26 and 27: 6 1. INTRODUCTION equation with FSR
Page 28 and 29: 8 1. INTRODUCTION L A M LCCU Analog
Page 30 and 31: 10 1. INTRODUCTION accelerator can
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Page 34 and 35: 14 1. INTRODUCTION interconnections
Page 36 and 37: 16 1. INTRODUCTION apply an adequat
Page 38 and 39: 18 1. INTRODUCTION The main differe
Page 40 and 41: 20 1. INTRODUCTION 1.4.3 Dedicated
Page 42 and 43: 22 1. INTRODUCTION 1.4.4 Xilinx FPG
Page 44 and 45: 24 1. INTRODUCTION management, and
Page 46 and 47: 26 1. INTRODUCTION 1.5 IBM Cell Bro
Page 48 and 49: 28 1. INTRODUCTION PPE PowerPC Proc
Page 50 and 51: 30 1. INTRODUCTION Even pipe Floati
Page 52 and 53: 32 1. INTRODUCTION 1.5.2 Cell Blade
Page 54 and 55: 34 1. INTRODUCTION 1.6 Recent Trend
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70 3. INVESTIGATING THE PRECISION O
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Chapter 4 Implementing a Global Ana
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4.2 Computational background and th
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4.3 Implementation 91 increased, so
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4.3 Implementation 93 required. Ana
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4.3 Implementation 95 Xilinx MicroB
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4.3 Implementation 97 outside the G
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4.4 The real image processing syste
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4.5 An Example 101 Input 1 st itera
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4.6 Device utilization 103 2000 150
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4.7 Results 105 Table 4.1: Comparis
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4.8 Conclusions 107 designed on FPG
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Chapter 5 Summary of new scientific
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111 performance on FPGA where the a
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5.1 Új tudományos eredmények (ma
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5.2 Application of the results 119
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122 REFERENCES [6] Z. Vörösházi,
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124 REFERENCES [22] T. Roska and L.
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126 REFERENCES [45] Z. Nagy and P.
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128 REFERENCES [68] L. O. Chua and
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PPKE ITK PhD and MPhil Thesis Classes

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