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1.4 Field Programmable Gate Arrays 19
requirements for an algorithm implementation.
The importance of the last factor can be reduced if pipelining technique is
used, which provides a continuous operation of the arithmetic unit.
The third type is the row-based routing architecture which can be seen in
Figure 1.10.
Figure 1.10: Row-based wiring
This type is mainly used in the not reprogrammable FPGA (called ”one-time
programmable FPGA”), that is why it is used less in todays reconfigurable systems.
It uses horizontal interconnections between two logical cluster. As the
figure shows there are several vertical interconnections for connecting row-based
channels. The row-based architecture uses segmented wires between routing channels
for decreasing the delays of the short interconnections.