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1416 JOURNAL OF COMPUTERS, VOL. 8, NO. 6, JUNE 2013<br />

Figure 6. Bar diagram compar<strong>in</strong>g the area efficiency metric for different architectures and for w<strong>in</strong>dow sizes from 3x3 to 19x19 us<strong>in</strong>g the parameters of<br />

the case study. The lower the bar, the more efficient.<br />

REFERENCE<br />

[1] Gonzalez, R.C. and R.E. Woods, “Digital Image Process<strong>in</strong>g,”<br />

Prentice Hall Press, 2002<br />

[2] B. S. Wu, C. C. Hsieh and C. C. Lee, “A Distance Computer<br />

Vision Assisted Yoga Learn<strong>in</strong>g System,” Journal of<br />

Computers, 11(6): pp.2382-2388, 2011<br />

[3] Z. Wang and X. Sun, “Orthogonal Maximum Marg<strong>in</strong> Projection<br />

for Face Recognition,” Journal of Computers, 2(7):<br />

pp.377-383, 2012<br />

[4] B. Zhu and W. J<strong>in</strong>, “Radar Emitter Signal Recognition<br />

Based on EMD and Neural Network,” Journal of Computers,<br />

6(7): pp.1413-1420, 2012<br />

[5] Hecht, V. and K. Ronner, “An Advanced Programmable<br />

2D-convolution Chip for Real Time Image Process<strong>in</strong>g,”<br />

IEEE International Sympoisum on Circuits and Systems,<br />

pp.1897-1900, 1991<br />

[6] Leblebici, Y., et al., “A <strong>Full</strong>y Pipel<strong>in</strong>ed Programmable Real-time<br />

(3×3) Image Filter Based on Capacitive Thresholdlogic<br />

gates,” Proceed<strong>in</strong>gs of IEEE International Symposium<br />

on Circuits and Systems, vol.3, pp. 2072-2075, 1997<br />

[7] Bosi, B., G. Bois, and Y. Savaria, “Reconfigurable Pipel<strong>in</strong>ed<br />

2-D Convolvers for Fast Digital Signal Process<strong>in</strong>g,”<br />

IEEE Transactions on Very Large Scale Integration (VLSI)<br />

Systems, 7(3): pp. 299-308, 1999<br />

[8] Liang, X., J. Jean, and K. Tomko, “Data Buffer<strong>in</strong>g and Allocation<br />

<strong>in</strong> Mapp<strong>in</strong>g Generalized Template Match<strong>in</strong>g on<br />

Reconfigurable Systems,” The Journal of Supercomput<strong>in</strong>g,<br />

19(1): pp. 77-91, 2001<br />

[9] Nakajima, M., et al., “A 40GOPS 250mw Massively Parallel<br />

Processor Based on Matrix Architecture,” IEEE International<br />

Solid-State Circuits Conference, pp.1616-1625,<br />

2006<br />

[10] Cardells-Tormo, F. and P.L. Mol<strong>in</strong>et, “Area-efficient 2-D<br />

Shift-variant Convolvers for FPGA-based Digital Image<br />

Process<strong>in</strong>g,” IEEE Workshop on Signal Process<strong>in</strong>g Systems<br />

Design and Implementation, pp. 209-213, 2005<br />

Zhijian Lu is a Ph.D. student <strong>in</strong> College of Computer Science<br />

and Technology of Harb<strong>in</strong> Eng<strong>in</strong>eer<strong>in</strong>g University, Harb<strong>in</strong>, Ch<strong>in</strong>a.<br />

His current research <strong>in</strong>terest <strong>in</strong>cludes neural network, reconfigurable<br />

comput<strong>in</strong>g and image process<strong>in</strong>g.<br />

Yanxia Wu is Associate Professor <strong>in</strong> College of Computer Science<br />

and Technology of Harb<strong>in</strong> Eng<strong>in</strong>eer<strong>in</strong>g University, Harb<strong>in</strong>,<br />

Ch<strong>in</strong>a. Her current research <strong>in</strong>terests <strong>in</strong>clude safe compiler, reconfigurable<br />

compiler and computer architecture.<br />

Zhenhua Guo is a Ph.D. student <strong>in</strong> College of Computer Science<br />

and Technology of Harb<strong>in</strong> Eng<strong>in</strong>eer<strong>in</strong>g University, Harb<strong>in</strong>, Ch<strong>in</strong>a.<br />

His current research <strong>in</strong>terest <strong>in</strong>cludes reconfigurable comput<strong>in</strong>g<br />

and embedded system.<br />

Guochang Gu is Professor <strong>in</strong> College of Computer Science and<br />

Technology of Harb<strong>in</strong> Eng<strong>in</strong>eer<strong>in</strong>g University, Harb<strong>in</strong>, Ch<strong>in</strong>a. His<br />

ma<strong>in</strong> research <strong>in</strong>terests <strong>in</strong>clude embedded systems and safe compiler.<br />

© 2013 ACADEMY PUBLISHER

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