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1466 JOURNAL OF COMPUTERS, VOL. 8, NO. 6, JUNE 2013
(a) { S
a1
, S
a2
}
only one path through D
a1
and D
a2
as shown in Figure 5
(c). When the fault { S
a2
} occurs, current flow (3) is
possible while current flow (1) or (2) is impossible. When
the fault { S
a1
, S
a2
} occurs, only current flow (3) is
possible. Hence, no difference exists in current flow and
the bridge voltages for the cases { S
a2
} and { S
a1
, S
a2
}.
This reveals that the fault modes { S
a2
} and { S
a1
, S
a2
}
cannot be isolated if only the bridge voltage is used.
1
U
2 d
D a5
S a1
S a2
D a1
a u
D a2
o
a
i a
Ra
b
Rb
c
Rc
(b) { S
a1
, S
a3
}
1
U
2 d
D a6
S a3
S a4
D a3
a d
D a4
L a
n
L b
L c
(a) Current flow (1)
1
U
2 d
D a5
S a1
S a2
D a1
a u
D a2
o
a
i a
R a
b
Rb
c
Rc
(c) { S
a1
, S
a4
}
1
U
2 d
D a6
S a3
S a4
D a3
a d
D a4
L a
n
L b
L c
(b) Current flow (2)
1
U
2 d
D a5
S a1
S a2
D a1
a u
D a2
(d) { S
a2
, S
a3
}
Figure 4. Bridge voltage when two devices malfunction
From Figure 3 and Figure 4 it could be found that the
circuit would have the same bridge voltage for the fault
modes { S
a2
} (see Figure 3 (c)) and { S
a1
, S
a2
} (see
Figure 4 (a)). This will be also the case for the fault
modes { S
a3
} and { S
a3
, S
a4
}.
Consider the current path in Figure 2 from a to o
through the upper half bridge where S
a1
, S
a2
, D
a5
,
Da1
and D
a2
are involved, and denote the current of phase
a as i a
. If i
a
> 0 , the current has two possible paths as
shown in Figure 5 (a-b), but if i
a
< 0 , the current has
o
1
U
2 d
D a6
S a3
S a4
a
i a
D a3
a d
D a4
Ra
(c) Current flow (3)
L a
b
n
Rb
L b
c
Rc
Figure 5. Diagram of NPC inverter work states
In order to isolate all possible fault modes, the voltages
of both the upper bridge and the down bridge as defined
before are introduced. Figure 6 shows the waveform of
the upper bridge voltage for { S
a2
} and { S
a1
, S
a2
}.
Obviously the waveform is different from each other.
L c
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