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1468 JOURNAL OF COMPUTERS, VOL. 8, NO. 6, JUNE 2013 ⎡t11 t12 t1 k ⎤ ⎡x11 x12 x1 n ⎤ ⎡p11 p12 p1k ⎤ ⎢ t21 t22 t ⎥ ⎢ 2k x21 x22 x ⎥ ⎢ 2n p21 p22 p ⎥ ⎢ ⎥ ⎢ ⎥ ⎢ 2k = ⋅ ⎥ ⎢ ⎥ ⎢ ⎥ ⎢ ⎥ ⎢ ⎥ ⎢ ⎥ ⎢ ⎥ t t t x x x p p p ⎣ m1 m2 mk⎦ ⎣ m1 m2 mn⎦ ⎣ n1 n2 nk⎦ Selecting a reduced subset of PC space results in a reduced dimension structure with respect to the important information available as shown in the following expression: [ t t t ] [ x x x ] ⎡ p11 p12 p1 k ⎤ ⎢ p p p ⎥ ⎢ ⎥ ⎢ ⎥ ⎣ pn 1 pn2 pnk⎦ 21 22 2k 1 2 k = 1 2 n ⋅ ⎢ ⎥ D. Artificial Neural Network ANN is a computer model whose architecture essentially mimics the knowledge acquisition and organizational skills of the human brain. Although there are a variety of ways to construct these models, Back- Propagated (BP) neural network has become one of the most widely used ANNs in practice. BP neural network with a single hidden layer is selected in this paper, which has been demonstrated to be sufficient to approximate any continuous function within the desired accuracy [20]. Figure 10 shows a diagram of neural network with a single hidden layer. x 1 (2) (3) The goal of the training of ANN is to minimize the error between predicted and target values by adjusting the connection weights and biased. The error is given by Equation (6): p q 2 E = ∑∑ ( apq −opq ) (6) p= 1 q= 1 Where q is the number of logic units in output layer, and p is the number of training samples, a pq and o pq are the predicted and target values, respectively. E. Multi-layer Neural Network A new method named as multi-layer neural network is proposed to diagnose all open-circuit fault modes under consideration for the NPC inverter, as shown in Figure 11. Feature A Main Feature Feature B Main ANN Output Auxiliary ANN A S or { S , S } a a a 2 1 2 S or { S , S } a a a 3 3 4 Auxiliary ANN B Figure 11. Multi-layer neural network Output Output y 1 x 2 x 3 x n n h q y 2 y q Figure 10. Neural network with a single hidden layer The three layers are called the input layer, hidden layer and output layer, respectively. Each layer consists of logic units or neurons, as the basic information processing units in ANN. The relationship of the input value of the unit i in input layer and that of unit j in hidden layer is: n uj = ∑ ω ji xi + bj (4) i= 1 Where x i is an input value of the logic unit i in the input layer, u j an initial output value of the logic unit j in the hidden layer, ω ji connection weights between unit j and i , b j input bias of the unit j , n the number of logic units in the input layer. The initial output value u j is further transformed with the common transfer function in a sigmoid form: 1 = (5) + O j u j 1 e − Where O is the final output value of the logic unit j . j TABLE I. FAULT MODES AND OUTPUT OF MAIN ANN Fault modes (open-circuit) Target output Fault free 000000 S a1 100000 S a2 or { S a1 , S a2 } 010000 S a3 or { S a3 , S a4 } 001000 S a4 000100 D a5 000010 D a6 000001 { S a1 , S a3 } 101000 { S a1 , S a4 } 100100 { S a2 , S a3 } 011000 { S a2 , S a4 } 010100 TABLE II. FAULT MODES AND OUTPUT OF AUXILIARY ANN A Fault modes (open-circuit) Target output S a2 0 { S a1 , S a2 } 1 Main Feature extracted from the bridge voltage V ao is used as input data for main ANN, which is used to diagnose eleven fault modes represented in Table I (including fault free mode). While Feature A and Feature B extracted from upper bridge voltage V auo and down bridge voltage V ado are used as the input data for auxiliary ANN A and B respectively. Table II and Table © 2013 ACADEMY PUBLISHER
JOURNAL OF COMPUTERS, VOL. 8, NO. 6, JUNE 2013 1469 III represent the fault modes diagnosed by two auxiliary ANNs and their target output. TABLE III. FAULT MODES AND OUTPUT OF AUXILIARY ANN B Fault modes (open-circuit) Target output S 0 { a3 a3 S , S a4 } 1 IV. DIAGNOSIS RESULT To verify the proposed method, an NPC inverter using MOSFET IRF640 as the switching device is used to carry out the three bridge voltages. A DSP chip TMS320F2812 is utilized to generate gate drive signals. The input DC voltage is 90V to 110V and the three phase wyeconnected load is 8Ω resistance series with 20mH inductance. Fault occurrence is created by physically removing switching signal in the desired position. Figure 12 shows the experimental bridge voltage waveforms for open-circuit fault of single device. Figure 13 shows the experimental bridge voltage waveforms when open-circuit fault occurring in two devices simultaneously. Figure 12. Experimental bridge voltage waveforms for open-circuit of single device Each fault mode from Tab.1 to Tab.3 must cover the operating region. Thus, there are three degrees of input DC voltage in the experiment include 90V, 100V and 110V. Under each DC voltage, the modulation index is changed from 0.2 to 1 with step of 0.1. Therefore, 27 sets original data can be obtained for each fault mode. The data whose modulation index is 0.5, 0.7 and 0.9 are utilized as test sample and the rest data are utilized as train sample. Volt:20/div Time:5ms/div (a) { S a1 , S a2 } Volt:20/div Time:5ms/div (a) S a1 open-circuit Volt:20/div Time:5ms/div (b) S a2 open-circuit Volt:20/div Volt:20/div Time:5ms/div (b) { S a1 , S a3 } Volt:20/div Time:5ms/div (c) { S a1 , S a4 } Volt:20/div Time:5ms/div (c) D a5 open-circuit Time:5ms/div (d) { S a2 , S a3 } Figure 13. Experimental bridge voltage waveforms when two devices malfunction © 2013 ACADEMY PUBLISHER
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Journal of Computers ISSN 1796-203X
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Corn Moisture Measurement using a C
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1378 JOURNAL OF COMPUTERS, VOL. 8,
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Call for Papers and Special Issues
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(Contents Continued from Back Cover
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