LPC2131/2132/2138 User Manual - mct.net

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Philips Semiconductors Preliminary User Manual ARM-based Microcontroller Reception of the ow n Slave Address and one or more Data bytes All are acknow ledged Arbitration lost as Master and addressed as Slave Last data byte transmitted. Sw itched to Not Addressed Slave (AA bit in I2CON = “0”) Data A Slave Transmitter Mode n From Master to Slave From Slave to Master S SLA R A Data A Data A P or S A8H B8H C0H This number (contained in I2STA) corresponds to a defined state of the I 2 C bus. Figure 32: Format and States of the Slave Transmitter Mode LPC2131/2132/2138 all ones In the slave transmitter mode, a number of data bytes are transmitted to a master receiver (see Figure 32). Data transfer is initialized as in the slave receiver mode. When I2ADR and I2CON have been initialized, the I 2 C block waits until it is addressed by its own slave address followed by the data direction bit which must be “1” (R) for the I 2 C block to operate in the slave transmitter mode. After its own slave address and the R bit have been received, the serial interrupt flag (SI) is set and a valid status code can be read from I2STAT. This status code is used to vector to a state service routine, and the appropriate action to be taken for each of these status codes is detailed in Table 105. The slave transmitter mode may also be entered if arbitration is lost while the I 2 C block is in the master mode (see state B0H). If the AA bit is reset during a transfer, the I 2 C block will transmit the last byte of the transfer and enter state C0H or C8H. The I 2 C block is switched to the not addressed slave mode and will ignore the master receiver if it continues the transfer. Thus the master receiver receives all 1s as serial data. While AA is reset, the I 2 C block does not respond to its own slave address or a general call address. However, the I 2 C bus is still monitored, and address recognition may be resumed at any time by setting AA. This means that the AA bit may be used to temporarily isolate the I 2 C block from the I 2 C bus. I2C Interfaces I2C0 and I2C1 134 November 22, 2004 A B0H Any number of data bytes and their associated Acknow ledge bits A C8H P or S
Philips Semiconductors Preliminary User Manual ARM-based Microcontroller Table 102: Master Transmitter Mode STATUS CODE STATUS OF THE I (I2STAT) 2 C BUS AND HARDWARE 08H A START condition has been transmitted 10H A repeated START condition has been transmitted APPLICATION SOFTWARE RESPONSE TO/FROM I2DAT TO I2CON STA STO SI AA LPC2131/2132/2138 NEXT ACTION TAKEN BY I 2 C HARDWARE Load SLA+W X 0 0 X SLA+W will be transmitted; ACK bit will be received. Load SLA+W or X 0 0 X As above. Load SLA+R X 0 0 X SLA+W will be transmitted; the I 2 C block will be switched to MST/REC mode. 18H SLA+W has been Load data byte or 0 0 0 X Data byte will be transmitted; ACK bit will be received. transmitted; ACK has been received no I2DAT action or 1 0 0 X Repeated START will be transmitted. no I2DAT action or 0 1 0 X STOP condition will be transmitted; STO flag will be reset. no I2DAT action 1 1 0 X STOP condition followed by a START condition will be transmitted; STO flag will be reset. 20H SLA+W has been Load data byte or 0 0 0 X Data byte will be transmitted; ACK bit will be received. transmitted; NOT ACK has been received no I2DAT action or no I2DAT action or 1 0 0 1 0 0 X X Repeated START will be transmitted. STOP condition will be transmitted; STO flag will be reset. no I2DAT action 1 1 0 X STOP condition followed by a START condition will be transmitted; STO flag will be reset. 28H Data byte in I2DAT has Load data byte or 0 0 0 X Data byte will be transmitted; ACK bit will be received. been transmitted; ACK has been received no I2DAT action or no I2DAT action or 1 0 0 1 0 0 X X Repeated START will be transmitted. STOP condition will be transmitted; STO flag will be reset. no I2DAT action 1 1 0 X STOP condition followed by a START condition will be transmitted; STO flag will be reset. 30H Data byte in I2DAT has Load data byte or 0 0 0 X Data byte will be transmitted; ACK bit will be received. been transmitted; NOT ACK has been received no I2DAT action or no I2DAT action or 1 0 0 1 0 0 X X Repeated START will be transmitted. STOP condition will be transmitted; STO flag will be reset. no I2DAT action 1 1 0 X STOP condition followed by a START condition will be transmitted; STO flag will be reset. 38H Arbitration lost in No I2DAT action or 0 0 0 X I SLA+R/W or Data bytes 2 C bus will be released; not addressed slave will be entered. No I2DAT action 1 0 0 X A START condition will be transmitted when the bus becomes free. I2C Interfaces I2C0 and I2C1 135 November 22, 2004
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