LPC2131/2132/2138 User Manual - mct.net

More documents

Recommendations

Info

Philips Semiconductors Preliminary User Manual ARM-based Microcontroller MAM CONFIGURATION LPC2131/2132/2138 After reset the MAM defaults to the disabled state. Software can turn memory access acceleration on or off at any time. This allows most of an application to be run at the highest possible performance, while certain functions can be run at a somewhat slower but more predictable rate if more precise timing is required. REGISTER DESCRIPTION All registers, regardless of size, are on word address boundaries. Details of the registers appear in the description of each function. Table 30: Summary of System Control Registers Name Description Access Reset MAM Value* MAMCR MAMTIM Memory Accelerator Module Control Register. Determines the MAM functional mode, that is, to what extent the MAM performance enhancements are enabled. See Table 31. Memory Accelerator Module Timing control. Determines the number of clocks used for Flash memory fetches (1 to 7 processor clocks). *Reset Value refers to the data stored in used bits only. It does not include reserved bits content. Address R/W 0 0xE01FC000 R/W 0x07 0xE01FC004 Memory Accelerator Module (MAM) 58 November 22, 2004
Philips Semiconductors Preliminary User Manual ARM-based Microcontroller MAM Control Register (MAMCR - 0xE01FC000) LPC2131/2132/2138 Two configuration bits select the three MAM operating modes, as shown in Table 31. Following Reset, MAM functions are disabled. Changing the MAM operating mode causes the MAM to invalidate all of the holding latches, resulting in new reads of Flash information as required. Table 31: MAM Control Register (MAMCR - 0xE01FC000) MAMCR Function Description 1:0 MAM mode control 7:2 Reserved MAM Timing Register (MAMTIM - 0xE01FC004) The MAM Timing register determines how many cclk cycles are used to access the Flash memory. This allows tuning MAM timing to match the processor operating frequency. Flash access times from 1 clock to 7 clocks are possible. Single clock Flash accesses would essentially remove the MAM from timing calculations. In this case the MAM mode may be selected to optimize power usage. MAM USAGE NOTES These bits determine the operating mode of the MAM as follows: 0 0 - MAM functions disabled. 0 1 - MAM functions partially enabled. 1 0 - MAM functions fully enabled. 1 1 - reserved Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined. Table 32: MAM Timing Register (MAMTIM - 0xE01FC004) MAMTIM Function Description 2:0 MAM Fetch Cycle timing 7:3 Reserved These bits set the duration of MAM Flash fetch operations as follows: 0 0 0 = 0 - Reserved. 0 0 1 = 1 - MAM fetch cycles are 1 processor clock (cclk) in duration. 0 1 0 = 2 - MAM fetch cycles are 2 processor clocks (cclks) in duration. 0 1 1 = 3 - MAM fetch cycles are 3 processor clocks (cclks) in duration. 1 0 0 = 4 - MAM fetch cycles are 4 processor clocks (cclks) in duration. 1 0 1 = 5 - MAM fetch cycles are 5 processor clocks (cclks) in duration. 1 1 0 = 6 - MAM fetch cycles are 6 processor clocks (cclks) in duration. 1 1 1 = 7 - MAM fetch cycles are 7 processor clocks (cclks) in duration. Warning: Improper setting of this value may result in incorrect operation of the device. Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined. Reset Value When changing MAM timing, the MAM must first be turned off by writing a zero to MAMCR. A new value may then be written to MAMTIM. Finally, the MAM may be turned on again by writing a value (1 or 2) corresponding to the desired operating mode to MAMCR. For system clock slower than 20 MHz, MAMTIM can be 001. For system clock between 20 MHz and 40 MHz, Flash access time is suggested to be 2 CCLKs, while in systems with system clock faster than 40 MHz, 3 CCLKs are proposed. Memory Accelerator Module (MAM) 59 November 22, 2004 0 NA Reset Value 0x07 NA
Page 1 and 2:
Philips Semiconductors INTEGRATED C
Page 3 and 4:
Philips Semiconductors Preliminary
Page 5 and 6:
Page 7 and 8: Philips Semiconductors Preliminary
Page 57: Philips Semiconductors Preliminary
Page 109 and 110:
Page 111 and 112:
Page 113 and 114:
Page 115 and 116:
Page 117 and 118:
Page 119 and 120:
Page 121 and 122:
Page 123 and 124:
Page 125 and 126:
Page 127 and 128:
Page 129 and 130:
Page 131 and 132:
Page 133 and 134:
Page 135 and 136:
Page 137 and 138:
Page 139 and 140:
Page 141 and 142:
Page 143 and 144:
Page 145 and 146:
Page 147 and 148:
Page 149 and 150:
Page 151 and 152:
Page 153 and 154:
Page 155 and 156:
Page 157 and 158:
Page 159 and 160:
Page 161 and 162:
Page 163 and 164:
Page 165 and 166:
Page 167 and 168:
Page 169 and 170:
Page 171 and 172:
Page 173 and 174:
Page 175 and 176:
Page 177 and 178:
Page 179 and 180:
Page 181 and 182:
Page 183 and 184:
Page 185 and 186:
Page 187 and 188:
Page 189 and 190:
Page 191 and 192:
Page 193 and 194:
Page 195 and 196:
Page 197 and 198:
Page 199 and 200:
Page 201 and 202:
Page 203 and 204:
Page 205 and 206:
Page 207 and 208:
Page 209 and 210:
Page 211 and 212:
Page 213 and 214:
Page 215 and 216:
Page 217 and 218:
Page 219 and 220:
Page 221 and 222:
Page 223 and 224:
Page 225 and 226:
Page 227 and 228:
Page 229 and 230:
Page 231 and 232:
Page 233 and 234:
Page 235 and 236:
Page 237 and 238:
Page 239 and 240:
Page 241 and 242:
Page 243 and 244:
Page 245 and 246:
Page 247 and 248:
Page 249 and 250:
Page 251 and 252:
Page 253 and 254:
Page 255 and 256:
Page 257 and 258:
Page 259 and 260:
Page 261 and 262:
Page 263 and 264:
show all

LPC2131/2132/2138 User Manual - mct.net

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?