LPC2131/2132/2138 User Manual - mct.net

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Philips Semiconductors Preliminary User Manual ARM-based Microcontroller ARCHITECTURE The block diagram for TIMER0 and TIMER1 is shown in Figure 48. Match Register 0 Match Register 1 Match Register 2 Match Register 3 Match Control Register External Match Register Interrupt Register MAT[3:0] Interrupt CAP[3:0] Stop on Match Reset on Match Load[3:0] Control Capture Control Register Capture Register 0 Capture Register 1 Capture Register 2 Capture Register 3* RESET Timer Control Register ENABLE * Note that Capture Register 3 cannot be used on TIMER0 Figure 48: Timer block diagram LPC2131/2132/2138 Timer/Counter0 and Timer/Counter1 184 November 22, 2004 CSN = = = MAXVAL = Timer Counter CE TCI Prescale Counter Prescale Register pclk
Philips Semiconductors Preliminary User Manual ARM-based Microcontroller 15. PULSE WIDTH MODULATOR (PWM) LPC2131/2132/2138 LPC2131/2132/2138 Pulse Width Modulator is based on standard Timer 0/1 described in the previous chapter. Application can choose among PWM and match functions available. FEATURES Seven match registers allow up to 6 single edge controlled or 3 double edge controlled PWM outputs, or a mix of both types. The match registers also allow: - Continuous operation with optional interrupt generation on match. - Stop timer on match with optional interrupt generation. - Reset timer on match with optional interrupt generation. An external output for each match register with the following capabilities: - Set low on match. - Set high on match. - Toggle on match. - Do nothing on match. Supports single edge controlled and/or double edge controlled PWM outputs. Single edge controlled PWM outputs all go high at the beginning of each cycle unless the output is a constant low. Double edge controlled PWM outputs can have either edge occur at any position within a cycle. This allows for both positive going and negative going pulses. Pulse period and width can be any number of timer counts. This allows complete flexibility in the trade-off between resolution and repetition rate. All PWM outputs will occur at the same repetition rate. Double edge controlled PWM outputs can be programmed to be either positive going or negative going pulses. Match register updates are synchronized with pulse outputs to prevent generation of erroneous pulses. Software must "release" new match values before they can become effective. May be used as a standard timer if the PWM mode is not enabled. A 32-bit Timer/Counter with a programmable 32-bit Prescaler. Four 32-bit capture channels take a snapshot of the timer value when an input signal transitions. A capture event may also optionally generate an interrupt. DESCRIPTION The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2131/2132/2138. The Timer is designed to count cycles of the peripheral clock (pclk) and optionally generate interrupts or perform other actions when specified timer values occur, based on seven match registers. It also includes four capture inputs to save the timer value when an input signal transitions, and optionally generate an interrupt when those events occur. The PWM function is in addition to these features, and is based on match register events. The ability to separately control rising and falling edge locations allows the PWM to be used for more applications. For instance, multi-phase motor control typically requires three non-overlapping PWM outputs with individual control of all three pulse widths and positions. Two match registers can be used to provide a single edge controlled PWM output. One match register (PWMMR0) controls the PWM cycle rate, by resetting the count upon match. The other match register controls the PWM edge position. Additional single edge controlled PWM outputs require only one match register each, since the repetition rate is the same for all PWM outputs. Multiple single edge controlled PWM outputs will all have a rising edge at the beginning of each PWM cycle, when an PWMMR0 match occurs. Pulse Width Modulator (PWM) 185 November 22, 2004
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