LPC2131/2132/2138 User Manual - mct.net

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Philips Semiconductors Preliminary User Manual ARM-based Microcontroller (IO0DIR - 0xE0028008, IO1DIR - 0xE0028018) LPC2131/2132/2138 This register is used to control the direction of the pins when they are configured as GPIO port pins. Direction bit for any pin must be set according to the pin functionality. Table 59: GPIO Direction Register (IO0DIR - 0xE0028008, IO1DIR - 0xE0028018) IODIR Description 31:0 GPIO USAGE NOTES Example 1: sequential accesses to IOSET and IOCLR affecting the same GPIO pin/bit State of the output configured GPIO pin is determined by writes into the pin’s port IOSET and IOCLR registers. Last of these accesses to the IOSET/IOCLR register will determine the final output of a pin. In case of a code: Direction control bits (0 = INPUT, 1 = OUTPUT). Bit 0 in IO0DIR controls P0.0 ... Bit 31 in IO0DIR controls P0.31 IO0DIR = 0x0000 0080 ;pin P0.7 configured as output IO0CLR = 0x0000 0080 ;P0.7 goes LOW IO0SET = 0x0000 0080 ;P0.7 goes HIGH IO0CLR = 0x0000 0080 ;P0.7 goes LOW pin P0.7 is configured as an output (write to IO0DIR register). After this, P0.7 output is set to low (first write to IO0CLR register). Short high pulse follows on P0.7 (write access to IO0SET), and the final write to IO0CLR register sets pin P0.7 back to low level. Example 2: immediate output of 0s and 1s on a GPIO port Write access to port’s IOSET followed by write to the IOCLR register results with pins outputting 0s being slightly later then pins outputting 1s. There are systems that can tolerate this delay of a valid output, but for some applications simultaneous output of a binary content (mixed 0s and 1s) within a group of pins on a single GPIO port is required. This can be accomplished by writing to the port’s IOPIN register. Following code will preserve existing output on PORT0 pins P0.[31:16] and P0.[7:0] and at the same time set P0.[15:8] to 0xA5, regardless of the previous value of pins P0.[15:8]: IO0PIN = (IO0PIN && #0xFFFF00FF) || #0x0000A500 Writing to IOSET/IOCLR .vs. IOPIN Value after Reset Write to IOSET/IOCLR register allows easy change of port’s selected output pin(s) to high/low level at a time. Only pin/bit(s) in IOSET/IOCLR written with 1 will be set to high/low level, while those written as 0 will remain unaffected. However, by just writing to either IOSET or IOCLR register it is not possible to instantaneously output arbitrary binary data containing mixture of 0s and 1s on a GPIO port. Write to IOPIN register enables instantaneous output of a desired content on a parallel GPIO. Binary data written into the IOPIN register will affect all output configured pins of that parallel port: 0s in the IOPIN will produce low level pin outputs and 1s in IOPIN will produce high level pin outputs. In order to change output of only a group of port’s pins, application must logically AND readout from the IOPIN with mask containing 0s in bits corresponding to pins that will be changed, and 1s for all others. Finally, this result has to be logically ORred with the desired content and stored back into the IOPIN register. Example 2 from above illustrates output of 0xA5 on PORT0 pins 15 to 8 while preserving all other PORT0 output pins as they were before. GPIO 88 November 22, 2004 0
Philips Semiconductors Preliminary User Manual ARM-based Microcontroller 9. UART0 FEATURES 16 byte Receive and Transmit FIFOs. Register locations conform to ‘550 industry standard. Receiver FIFO trigger points at 1, 4, 8, and 14 bytes. Built-in baud rate generator. LPC2131/2132/2138 contains mechanism that enables software flow control implementation. PIN DESCRIPTION Table 60: UART0 Pin Description Pin Name Type Description RxD0 Input Serial Input. Serial receive data. TxD0 Output Serial Output. Serial transmit data. LPC2131/2132/2138 UART0 89 November 22, 2004
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