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Chapter 2 <br />

X5: CLIDSP daughterboard plugging connector (detection of CLIP signal).<br />

X60, X61, X62, X70, X71, and X72: GSCLI daughterboards plugging connectors (Ground<br />

Start signaling).<br />

2.2.13.1.1 CLIDSP BOARD EQUIPMENT<br />

The signal needed to manage the CLIP (Calling Line Identification Presentation) is generated<br />

at the CPU board level except in the following cases, which require a CLIDSP board (to be<br />

installed on connector X5 of the board): US, UK and all countries using only Dual Tone<br />

(DT-AS) as alert signal.<br />

The CLIDSP board will also be necessary to detect the CLIP in the on-hook state (later<br />

phase).<br />

2.2.13.2 External connections<br />

2.2.13.2.1 OUTPUT PORTS (FACEPLATE)<br />

2-44

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