1. xerox 560 computer system - The UK Mirror Service

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Many operations are performed in floating-point formatand on strings of characters. Other typical characteristicsinclude decimal arithmetic operations, binary to decimalnumber conversion (for printing or display), and high systemi nput/ output transfer rates.General-purpose features are described in the followingparagraphs.Floating-Point Hardware. Both short (32-bit) and long(64-bit) formats are available in the floating-point instructions.Under program control, the user may selectoptional zero checking, normalization, floating-pointrounding and significance checking. Significance checkingpermits use of short floating-point format for high processingspeed and storage economy and of long floatingpointformat when loss of significance is detected.Decimal Arithmetic Hardware. Decimal arithmetic instructionsoperate on up to 31 digits plus sign. This instructionset includes pack/unpack instructions for converting to/fromthe packed format of two digits per byte, and a generalizededit instruction for zero suppression, check protection, andformatting, with punctuation to display or print it.Indirect Addressing. Indirect addressing faci litates tablelinkages and permits keeping data sections of a programseparate from procedure sections for ease of maintenance.Displacement Indexing. Indexing by means of a IIfloating lidisplacement permits accessing a desired unit of data withoutconsidering its size. The index registers automaticallyalign themselves appropriately; thus, the same index registermay be used on arrays with different data sizes. Forexample, in a matrix multiplication of any array of fullword, single-precision, fixed-point numbers, the resultsmay be stored in a second array as double-precision numbers,using the same index quantity for both arrays. If anindex register contains the value of k, then the user alwaysaccesses the kth element, whether it is a byte, halfword,word, or doubleword. Incrementing by various quantitiesaccording ro daro size is nor required; instead, incrementingis always by units in a continuous array table regardlessof the size of data element used.Instruction Set. More than 100 major instructions permitshort, highly optimized programs to be written. These arerapidly assembled and minimize both program space andexecution time.Translate Instruction. The Translate instruction permitsrapid translation between any two 8-bit codes; thus, datafrom a variety of input sources can be handled and reconvertedeasi iy for output.Conversion Instructions. Two generalized conversion instructionsprovide for bidirectional conversions betweeninternal binary and any other weighted number system,including BCD.Call Instructions. These four instructions permit handlingup to 64 user-defined subroutines, as if they were built-inmachine instructions. Call instructions also gain access tospecified operating system services without requiring itsi nterventi on.Interpret Instruction. The Interpret instruction simplifiesand speeds interpretive operations such as compilation, thusreducing space and time requirements for compilers andother interpretive systems.Four-Bit Condition Code. Checking results is simplified byautomatically providing information on almost every instructionexecution, including indicators for overflow, underflow,zero, minus, and plus, as appropriate, withoutrequiring an extra instruction execution.Direct Input/Output (DIO). Direct input/output faci litatesin-line program control of asynchronous or specialpurposedevices. This feature permits information to betransmitted directly to or from general-purpose registers.Multi lexor Input/Out ut Processor (MIOP). Once initialized,I 0 processors operate independently of the basicprocessor, freeing it to provide faster response to systemneeds. An MIOP requires minimal interaction with thebasic processor. I/O command doublewords permit bothcommand chaining and data chaining without interveningbasic processor control. I/o equipment speeds range fromslow rates involving human interaction (teletypewriter, forexample) to transfer rates of rotating memory devices ofover 750,000 bytes per second. Peripheral controllers attachedto an MIOP may be operated simultaneously.Rotating Memory Processor (RMP). An RMP supports up to15 disk drives, one at a time, permitting large capacity,high transfer rate files. Dual access (between 2 RMPs) optionis available.TIME -SHARING FEATURESTi me-shari ng is the abi Ii ty of a system to share its tota Iresources among many users at the same time. Each usermay be performing a different task, requiring a differentshare of the available resources. Some users may be onlinein an interactive, IIconversational limode with thebasic processor while other users may be entering work tobe processed that requires only final output.Time-sharing features are described in the followingparagraphs.Rapid Context Saving. When changing from one user toanother, the operating environment can be switched quicklyand easily. Stack-manipulating instructions permit storingin a push-down stack of 1 to 16 general-purpose registers bya single instruction. Stack status is updated automaticallyand information in the stack can be retrieved when needed4 Time-Sharing Features
(also, by a single instruction). The current program statuswords, which contain the entire description of the currentuser's environment and mode of operation, may be storedanywhere in memory, and new program status words may beloaded, all with a single instruction.Multiple Register Blocks. The availability of four blocksof 16 general-purpose registers improves response time byreducing the need to store and load register blocks. Adistinct block may be assigned for different functions asneeded; the program status words automatically select theapplicable register block.User Protection. The slave mode feature restricts each userto his own set of instructions while reserving to the operatingsystem certain "privileged" (master mode) instructionsthat could destroy another user's program if used incorrectly.Also, a memory access - protection feature preventsa user from accessi ng any storage areas other thanthose assigned to him. It permits him to access certain areasfor reading only, such as those containing publ ic subroutines,while preventing him from reading, writing, or accessinginstructions in areas set aside for other users.Storage Management. Main memory is expandable to 256K(K = 1024) words. To make efficient use of available memory,the memory map hardware permits storing a user's programin fragments as sma II as a page of 512 words, whereverspace is avai lable; yet all fragments appear as a single,contiguously addressable block of storage at execution time.The memory map also automatically handles dynamic programrelocation so that the program appears to be stored inn dnnrlrlrt"l v.i0}' 0t ~X~ClJt!0!",! t!!'!'!e, e'!e!"! th0~gh it !'!'!cy cctuallybe stored in a different set of locations each time itis brought into memory. The memory map provides theabi I ity to locate any 128K-word virtual program in the basicprocessor's logical addressing space. Thus, the system canalways address a virtual memory of 128K words regardlessof physical memory size.Input/Output Capability. Time-sharing input/output requirementsare handled by the same general-purpose input/output capabi I i ti es descri bed under II Genera I-PurposeFeatures".Nonstop Operation. A "watchdog" timer assures that thesystem continues to operate even in case of halts or delaysdue to fai lure of special I/O devices. Multiple real-timeclocks with varying resolutions permit independent timebases for flexible allocation of time slices to each user.Reliability, Maintainability, Availability. Since timesharingsystems have many on-line users needing immediatesystem response, "downtime" defeats time sharing's primarypurpose. Pool i ng of resources a long wi th fl exi bl e reconfigurationcontrol ensures a high level of continuous availability.Configuration controls are provided to switch theload from one unit to another in the event of a failure withno loss of functional capability, only capacity. In addition,a nonworking subset of the total system may belogically isolated (partitioned) so that maintenance mayproceed on the subset while the remainder of the systemconti nues to operate.To minimize the effect of transient errors, automatic retryof fa i led instructions is performed.REAL-TIME FEATURESReal-time applications are characterized by a need for:(1) hardware that provides quick response to an externalenvironment; (2) speed that is sufficient to keep up withthe real-time process itself; (3) input/output flexibility tohandle a wide variety of data types at different speeds;and (4) reliabi lity features to minimize irreplaceable losttime.Multilevel, Priority Interrupt System. The real-timeoriented system provi des rapi d response to external interruptlevels. Each interrupt is automatically identified and respondedto according to its priority. For further flexibi lity,each level can be individually disarmed (to discontinue inputacceptance) and disabled (to defer responses). Use ofthe disarm/disable feature makes programmed dynamic reassignmentof priorities quick and easy, even while a realtime process is in progress.Programs involving interrupts from specially designed equipmentoften require checkout before the equipment is actuallyavai lable. To permit simulating this special equipment, anyexternal interrupt level can be "triggered" by the basicprocessor through execution of a single instruction. Thiscapability is also useful in establishing a modified hierarchyof responses. For example, in responding to a high-priorityinterrupt, after the urgent processing is completed, it maybe desirable to assign a lower priority to the remaining portionso that the interrupt routine is free to respond to othercritical stimul i. The interrupt routine can accomplish thisby triggering a lower-priority level, which processes theremaining data only after other interrupts have been handled.READ DIRECT and WRITE DIRECT instructions (described inChapter 3) allow the program to completely interrogate,preserve, and a I ter the conditi on of the interrupt system atany time and to restore that system at a later time.Nonstop Operation. When connected to special devices(on a ready/resume basis), the basic processor may be excessivelydelayed if the specific device does not respondquickly. As in the time-sharing environment, the built-inwatchdog timer assures that the basic processor cannot bedelayed for an excessive length of time.Real-Time Clocks. Many real-time functions must be timedto occur at specific instants. Other timing information isalsoneeded - for example, elapsed time since a given event, orthe current time of day. The computer system can containup to four real-time clocks with varying degrees of resolution to meet these needs. These clocks a I so a II ow easy handlingof separate time bases and relative time priorities.Real-Time Features 5
Page 1 and 2: Xerox 560 ComputerReference Manual9
Page 5 and 6: 4. INPUT/OUTPUT OPERA TIO NS 142 AG
Page 7 and 8: 1. XEROX 560 COMPUTER SYSTEMINTRODU
Page 12 and 13: Rapid Context Switching. When respo
Page 14 and 15: 2. SYSTEM ORGANIZATIONThe elements
Page 16: FAST MEMORYARITHMETIC AND CONTROL U
Page 19 and 20: INFORMATION BOUNDARIESBasic process
Page 21 and 22: (Maximumof eight)Core Core Core Cor
Page 23 and 24: 3. Diagnostic logic. Each memory dr
Page 25 and 26: eference address field of the instr
Page 27 and 28: Instruction in memory:Instruction i
Page 29 and 30: Real-extended addressing is specifi
Page 31: Table 1. Basic Processor Operating
Page 35 and 36: DesignationFunctionDesignationFunct
Page 37 and 38: InterruptStateDisarmedArmed[$Waitin
Page 39 and 40: AddressTable 2. Interrupt Locations
Page 41 and 42: is assumed to contain an XPSD or a
Page 43 and 44: Table 3. Summary of Trap LocationsL
Page 45 and 46: TRAP MASKSThe programmer may mask t
Page 47 and 48: PUSH-DOWN STACK LIMIT TRAPPush-down
Page 49 and 50: Instruction Name Mnemonic FaultDeci
Page 51 and 52: subroutine. However, with certain c
Page 53 and 54: 3. INSTRUCTION REPERTOIREThis chapt
Page 55 and 56: CC1 is unchanged by the instruction
Page 57 and 58: Condition code settings:2 3 4 Resul
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Example 2, odd R field value:Before
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significance (FS), floating zero (F
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next sequential register after regi
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R 1 R2 R3 MeaningoThe effective vir
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Condition code settings:2 3 4 Resul
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MIMULTIPLY IMMEDIATE(Immediate oper
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original contents of register R, re
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Instruction NameCompare HalfwordMne
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Condition code settings:2 3 4 Resul
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2 3 4 Result of ShiftCircular Shift
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4. At the completion of the left sh
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Instruction NameFloating Subtract L
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The following table shows the possi
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Table 8.Condition Code Settings for
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PACKED DECIMAL NUMBERSAll decimal a
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DSTDECIMAL STORE(Byte index alignme
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If no indirect addressing or indexi
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Instruction NameMnemonicDesignation
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Both byte strings are C bytes in le
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of the destination byte that caused
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again present, unti I a positive or
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The new contents of register 7 are:
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traps to location X'42 1 as a resul
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If there is sufficient space in the
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If CC1, or CC3, or both CC1 and CC3
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appropriate memory stack locations
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II, EI) are generated by II ORing"
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In the real extended addressing mod
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CAll INSTRUCTIONSEach ofthe four CA
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The XPSD instruction' is used for t
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If (I)1O = 0, trap or interrupt ins
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For either memory map format and ei
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initial value plus the initial valu
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Table 9. Status Word 0Field Bits Co
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READ INTERRUPT INHIBITSThe followin
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Table 11.Read Direct Mode 9 Status
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SET ALARM INDICATORThe following co
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INPUT jOUTPUT INSTRUCTIONSThe I/o i
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Table 13.Description of I/o Instruc
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Table 15.Device Status Byte (Regist
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Table 16. Operational Status Byte (
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Table 19.Status Response Bits for A
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If CC4 = 0, the MIOP is in a normal
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2 3 4 Meaningo 0 I/o address not re
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The functions of bits within the DC
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4. Each unit-record controller (int
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Interrupt at Channel End (Bit Posit
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Transfer in Channel. A control lOCO
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Otherwise, the first word of the ne
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Depending upon the characteristics
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change the rate on the primary cons
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Location(hex) (dec)20 3221 3322 342
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Table 22.Diagnostic Control (P-Mode
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at its normal rate (e. g., fixed du
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SET LOW CLOCK MARGINSThis command c
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BP STATUS AND NO.Th i s group of i
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Input5MPri ntout5MFunctionStore X 1
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6. SYSTEM CONFIGURATION CONTROLPool
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Table 25. Functions of Processor Cl
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Table 26. Functions of Memory Unit
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STANDARD 8-BIT COMPUTER CODES (EBCD
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STANDARD SYMBOL-CODE CORRESPONDENCE
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STANDARD SYMBOL-CODE CORRESPONDENCE
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TABLE OF POWERS OF SIXTEEN II162564
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HEXADECIMAL-DECIMAL INTEGER CONVERS
Page 190 and 191:
Page 192 and 193:
Page 194 and 195:
HEXADECIMAL-DECIMAL FRACTION CONVER
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HEXADECIMAL-DECIMAL FRACTION CONVER
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APPENDIX B.GLOSSARY OF SYMBOLIC TER
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TermMeaningTermMeaningWKxWrite key
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Table C-2. Memory Unit Status Regis
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Y OYf'lV r'f'lrnf'lrtil"\n'''' ....
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