OVERFLOW DETECTIONArithmetic overflow can occur during execution of thefollowing decimal instructions:DECIMAL ADD. Overflow occurs when the sum of thetwo decimal numbers exceeds the 31-digit capacity of thedecimal accumulator (+103 1 -1 to -1031 + 1).DECIMAL SUBTRACT. Overflow occurs when the differencebetween the two decimal numbers exceeds the 31-digitcapacity of the decimal accumulator.DECIMAL DIVIDE. Overflow occurs either when the divisoris zero, or when the dividend is greater than 14 digits inlength and the absolute value of the significant digitsto the left of the 15th digit position (counting from theright) is greater than or equal to the absolute value ofthe divisor.CONDITION CODE SETTINGSAll decimal instructions provide condition code settings,using CCl to indicate whether or not an illegal digit orsign has been detected, and CC2 to indicate whether ornot overflow has occurred. Most (but not all) of the decimalinstructions provide condition code settings, using CC3and CC4 to indicate whether the decimal number in thedecimal accumulator is zero, negative, or positive, asfollows:CC3 CC4 Result in DECAoo°Zero - the decimal accumulator contains apositive or negative decimal sign code in thefour low-order bit positions; the remainder ofthe decimal accumulator contains all OIS.Negative - the decimal accumulator containsa negative decimal sign code in thefour low-order bit positions; the remainderof the decimal accumulator contains at leastone nonzero decimal digit.If arithmetic overflow occu;"s during execution of DECIMALADD, DECIMAL SUBTRACT, or DECIMAL DIVIDE, thebasic processor unconditionally aborts execution of theinstruction (at the time of overflow detection), resets CClto 0, and sets CC2 to <strong>1.</strong> <strong>The</strong>n, if the decimal arithmeticfault trap mask (PSWslO) is a 1, the basic processor trapsto location Xl45 1 ; if the decimal arithmetic fault trap maskis a 0, the basic processor executes the next instruction insequence. In either case, the contents of the decimalaccumulator, memory storage, CC3, and CC4 remainunchanged.DLo Positive - the decimal accumulator containsa positive decimal sign code in the four loworderbit positions; the remainder of the decimalaccumulator contains at least one nonzerodecimal digit.DECIMAL LOAD(Byte index alignment)DECIMAL INSTRUCTION NOMENCLATUREFor the purpose of abbreviating the instruction descriptionsto follow, the symbolic term "DECA" is used to representthe decimal accumulator, and the symbolic term "EDO" isused to represent the effective decimal operand of the instruction.For the instructions DECIMAL LOAD, DECIMALADD, DECIMAL SUBTRACT, DECIMALMULTIPLY, DECIMALDIVIDE, and DECIMAL COMPARE, the effective decimaloperand is a packed decimal number that is II L" bytesin length, where L is the numeric value of bit positions8-11 of the instruction word, and a value of 0 for Ldesignates 16 bytes. <strong>The</strong> effective byte addresses ofthese instructions point to the byte location that containsthe most significant byte (high-order digits) of the decimalnumber, and the effective byte address plus L-l (whereL = ° = 16) points to the least significant byte (low-orderdigit and sign) of the decimal number. Thus, for these instructions,the effective decimal operand (EDO) is the contentsof the byte string that begins with the effective bytelocation, is L bytes in length, and ends with the effectivebyte location plus L-l.If no illegal digit or sign is detected in the effectivedecimal operand, DECIMAL LOAD expands the effectivedecimal operand to 16 bytes (31 digits + sign) by appendinghigh-order OIS, and then loads the expanded decimal numberinto the decimal accumulator. If the result in thedecimal accumulator is zero! the converted sign remainsunchanged.Affected: (DECA), CC(EBL to EBL + L - 1) -Condition code settings:DECA2 3 4 Result in DECA°Trap: Decimal arithmetic- Illegal digit or sign detected, i nstructi onaborted0 0 0 0 ZeroINo illegal digit or illegal sign0 0 0 Negativedetected, instruction completed0 0 0 Positive82 Decimal Instructions
DSTDECIMAL STORE(Byte index alignment)Condition code settings:2 34 Result in DECAIf no illegal digit or sign is detected in the decimalaccumulator, DECIMAL STORE stores the low-order L bytesof the decimal accumulator into memory from the effectivebyte location to the effective byte location plus L-l.If the decimal accumulator contains more significant informationthan is actually stored (i. e., at least one nonzerodigit was not stored), CC2 is set to 1; otherwise, CC2is reset to O. If the result in memory is zero, the convertedsi gn remains unchanged.Affected: (EBL to EBL + L-l),CC1, CC2Trap: Decimal arithmetic(DECA) low-order bytes - EBL to EBL + L -1000 0 00 0 00 0DS- Illegal digit orIsi gn detectedOverflow0 ZeroNegative0 PositiveDECIMAL SUBTRACT(Byte index alignment)Instruction abortedNo illegal digit or signdetected, no overflow,instruction completedCondition code settings:2 3 4 Result of DSTo - - Illegal digit or sign detected, instructionaborted0 0 - All significant informationstored0 Some significantinformaTion norstoredDADECIMAL ADD(Byte index alignment)1JNo illegal digit orillegal sign detected,instruction completedIf no illegal digit or sign is detected in the effective decimaloperand or in the decimal accumulator, DECIMALSUBTRACT algebraically subtracts the decimal number fromthe contents of the decimal accumulator, and then loadsthe difference into the decimal accumulator. If the resultin the decimal accumulator is zero, the resulting sign isforced to the positive form.Overflow occurs if the difference exceeds the capacity ofthe decimal accumulator (i. e., if the absolute value of thedifference is equal to or greater than 10 31 ), in which caseCCl is reset to 0, CC2 is set to 1, and the instruction isaborted with the contents of the previous decimal accumulator,CC3 and CC4 unchanged.79Affected: (DECA), CCTrap: Decimal arithmetico 1 2(DECA) - EDO -DECAIf no illegal digit or sign is detected in the effective decimaloperand or in the decimal accumulator, DECIMAL ADDalgebraically adds the decimal number to the contents ofthe decimal accumulator. If the result in the decimalaccumulator is zero, the resulting sign is forced to thepositive form.Overflow occurs if the sum exceeds the capacity of thedecimal accumulator (i. e., if the absolute value of the sumis equal to or greater than 1031 ), in which case CCl isreset to 0, CC2 is set to 1, and the instruction aborted withthe previous contents of the decimal accumulator, CC3and CC4 unchanged.Affected: (DECA), CC(DECA) + EDO -DECATrap: Decimal arithmeticCondition code settings:o0002 3 4 Result in DECAo0 00 00- Illegal digit or )si gn detected- Overflow0 ZeroNegative0 PositiveInstruction abortedNo illegal digit or signdetected, no overflow,instruction completedDecimal Instructions 83
- Page 1 and 2:
Xerox 560 ComputerReference Manual9
- Page 5 and 6:
4. INPUT/OUTPUT OPERA TIO NS 142 AG
- Page 7 and 8:
1. XEROX 560 COMPUTER SYSTEMINTRODU
- Page 10 and 11:
Many operations are performed in fl
- Page 12 and 13:
Rapid Context Switching. When respo
- Page 14 and 15:
2. SYSTEM ORGANIZATIONThe elements
- Page 16:
FAST MEMORYARITHMETIC AND CONTROL U
- Page 19 and 20:
INFORMATION BOUNDARIESBasic process
- Page 21 and 22:
(Maximumof eight)Core Core Core Cor
- Page 23 and 24:
3. Diagnostic logic. Each memory dr
- Page 25 and 26:
eference address field of the instr
- Page 27 and 28:
Instruction in memory:Instruction i
- Page 29 and 30:
Real-extended addressing is specifi
- Page 31:
Table 1. Basic Processor Operating
- Page 35 and 36:
DesignationFunctionDesignationFunct
- Page 37 and 38: InterruptStateDisarmedArmed[$Waitin
- Page 39 and 40: AddressTable 2. Interrupt Locations
- Page 41 and 42: is assumed to contain an XPSD or a
- Page 43 and 44: Table 3. Summary of Trap LocationsL
- Page 45 and 46: TRAP MASKSThe programmer may mask t
- Page 47 and 48: PUSH-DOWN STACK LIMIT TRAPPush-down
- Page 49 and 50: Instruction Name Mnemonic FaultDeci
- Page 51 and 52: subroutine. However, with certain c
- Page 53 and 54: 3. INSTRUCTION REPERTOIREThis chapt
- Page 55 and 56: CC1 is unchanged by the instruction
- Page 57 and 58: Condition code settings:2 3 4 Resul
- Page 59 and 60: Example 2, odd R field value:Before
- Page 61 and 62: significance (FS), floating zero (F
- Page 63 and 64: next sequential register after regi
- Page 65 and 66: R 1 R2 R3 MeaningoThe effective vir
- Page 67 and 68: Condition code settings:2 3 4 Resul
- Page 69 and 70: MIMULTIPLY IMMEDIATE(Immediate oper
- Page 71 and 72: original contents of register R, re
- Page 73 and 74: Instruction NameCompare HalfwordMne
- Page 75 and 76: Condition code settings:2 3 4 Resul
- Page 77 and 78: 2 3 4 Result of ShiftCircular Shift
- Page 79 and 80: 4. At the completion of the left sh
- Page 81 and 82: Instruction NameFloating Subtract L
- Page 83 and 84: The following table shows the possi
- Page 85 and 86: Table 8.Condition Code Settings for
- Page 87: PACKED DECIMAL NUMBERSAll decimal a
- Page 91 and 92: If no indirect addressing or indexi
- Page 93 and 94: Instruction NameMnemonicDesignation
- Page 95 and 96: Both byte strings are C bytes in le
- Page 97 and 98: of the destination byte that caused
- Page 99 and 100: again present, unti I a positive or
- Page 101 and 102: The new contents of register 7 are:
- Page 103 and 104: traps to location X'42 1 as a resul
- Page 105 and 106: If there is sufficient space in the
- Page 107 and 108: If CC1, or CC3, or both CC1 and CC3
- Page 109 and 110: appropriate memory stack locations
- Page 111 and 112: II, EI) are generated by II ORing"
- Page 113 and 114: In the real extended addressing mod
- Page 115 and 116: CAll INSTRUCTIONSEach ofthe four CA
- Page 117 and 118: The XPSD instruction' is used for t
- Page 119 and 120: If (I)1O = 0, trap or interrupt ins
- Page 121 and 122: For either memory map format and ei
- Page 123 and 124: initial value plus the initial valu
- Page 125 and 126: Table 9. Status Word 0Field Bits Co
- Page 127 and 128: READ INTERRUPT INHIBITSThe followin
- Page 129 and 130: Table 11.Read Direct Mode 9 Status
- Page 131 and 132: SET ALARM INDICATORThe following co
- Page 133 and 134: INPUT jOUTPUT INSTRUCTIONSThe I/o i
- Page 135 and 136: Table 13.Description of I/o Instruc
- Page 137 and 138: Table 15.Device Status Byte (Regist
- Page 139 and 140:
Table 16. Operational Status Byte (
- Page 141 and 142:
Table 19.Status Response Bits for A
- Page 143 and 144:
If CC4 = 0, the MIOP is in a normal
- Page 145 and 146:
2 3 4 Meaningo 0 I/o address not re
- Page 147 and 148:
The functions of bits within the DC
- Page 149 and 150:
4. Each unit-record controller (int
- Page 151 and 152:
Interrupt at Channel End (Bit Posit
- Page 153 and 154:
Transfer in Channel. A control lOCO
- Page 155 and 156:
Otherwise, the first word of the ne
- Page 157 and 158:
Depending upon the characteristics
- Page 159 and 160:
change the rate on the primary cons
- Page 161 and 162:
Location(hex) (dec)20 3221 3322 342
- Page 163 and 164:
Table 22.Diagnostic Control (P-Mode
- Page 165 and 166:
at its normal rate (e. g., fixed du
- Page 167 and 168:
SET LOW CLOCK MARGINSThis command c
- Page 169 and 170:
BP STATUS AND NO.Th i s group of i
- Page 171 and 172:
Input5MPri ntout5MFunctionStore X 1
- Page 173 and 174:
6. SYSTEM CONFIGURATION CONTROLPool
- Page 175 and 176:
Table 25. Functions of Processor Cl
- Page 177:
Table 26. Functions of Memory Unit
- Page 180 and 181:
STANDARD 8-BIT COMPUTER CODES (EBCD
- Page 182 and 183:
STANDARD SYMBOL-CODE CORRESPONDENCE
- Page 184 and 185:
STANDARD SYMBOL-CODE CORRESPONDENCE
- Page 186 and 187:
TABLE OF POWERS OF SIXTEEN II162564
- Page 188 and 189:
HEXADECIMAL-DECIMAL INTEGER CONVERS
- Page 190 and 191:
HEXADECIMAL-DECIMAL INTEGER CONVERS
- Page 192 and 193:
HEXADECIMAL-DECIMAL INTEGER CONVERS
- Page 194 and 195:
HEXADECIMAL-DECIMAL FRACTION CONVER
- Page 196 and 197:
HEXADECIMAL-DECIMAL FRACTION CONVER
- Page 198 and 199:
APPENDIX B.GLOSSARY OF SYMBOLIC TER
- Page 200 and 201:
TermMeaningTermMeaningWKxWrite key
- Page 202 and 203:
Table C-2. Memory Unit Status Regis
- Page 204 and 205:
Y OYf'lV r'f'lrnf'lrtil"\n'''' ....
- Page 206:
701 South Aviation BoulevardEI Segu