1. xerox 560 computer system - The UK Mirror Service

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ExamEle 2, L = 6:Example 1, L = 10:Before executionAfter executionBefore executionAfter executionEDO X'000938F7 X'000938F7E655B483E655B48302F1 BO'02F1BO'(DECA)X'ooOOOOOO00000001234567890123456D'X'OOOOOOOO00000001234567890123456D'(DECA) xxxxxxxx X'ooOOOooOxxxxxxxx 00000000xxxxxxxx 00000987xxxxxxxx6543210D'CC xxxx 0001EDOCCxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxX'FOFOFOFlF2F3F4F5F6F7F8F9FOF1F2F3F4F5D6'OOxxUNPKUNPACK DECIMAL DIGITS(Byte index alignment, continue after interrupt)Example 2, L = 8:Before executionAfter executionIf no illegal digit or sign is detected in the decimal accumulator(assumed to be in packed decimal format), UNPACKDECIMAL DIGITS converts the contents of the low-orderL bytes of the decimal accumulator to zoned decimal formatand stores the result, as a byte string, from the effectivebyte location to the effective byte location plus 2L-2.The contents of the four low-order bit positions of the decimalaccumulator are used to select the sign code for thelast digit of the string; for all other digits, the zones are1111 (X'F'). The contents of the decimal accumulator remainunchanged, and only 2L-l bytes of memory are altered.If the decimal accumulator contains more significant informationthan is actually unpacked and stored, CC2 is set to 1;otherwise, CC2 is reset to O. If the result in memory iszero, the resulting sign remains unchanged.Affected: (EBltoEBL+2L-2),CC1, CC2zoned (DECA) - EBL to EBL + 2L -2Trap: Decimal arithmetic(DECA)EDOCCX'OOOOOOOO23000000100012340012345C'xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxExample 3, L = 4:(DECA)EDOBefore executionX '0000 100 100001002000010030001004F'xxxxxxxxxxxxxxxxX '000000002300000010001234OO12345C'X'F1FOFOFOF1F2F3F4FOFOF1 F2F3F4C5'01xxAfter executionX'OOOOlool00001002000010030001004F'X'FOFOFOF1FOFOC4'Condition code settings:CCxxxxOlxx2 3 4 Result of UNPKoIllegal digit or sign detected, instructionabortedo 0 - - All significant informationzoned andstoredoSome signifi cantinformation notzoned and storedNo illegal digitor sign detected,instructioncompletedBYTE -STRING INSTRUCTIONSFive instructions provide for the manipulation of strings ofconsecutive bytes. The byte-string instructions and theirmnemonic codes ore as f()lI()ws~Instruction NameMnemonicMove Byte StringMBSCompare Byte StringCBS86 Byte-String Instructions
Instruction NameMnemonicDesignationFunctionTranslate Byte StringTrans I ate and Test Byte Stri ngEdit Byte StringTBSTTBSEBSThese instructions are in the immediate byte operand classand are memory-to-memory operations. These operationsare under the control of information that must be loadedinto certain general registers before the instruction is executed.Except for the MOVE BYTE STRING instruction,which proceeds four bytes at a time under certain conditions,a byte string instruction proceeds one byte at a timeand may be interrupted after any individual byte operation.Upon return, execution resumes from the pointofinterruption.The general format for the information in the instructionword and in the general registers is as follows:Instruction word:Contents of register R:Contents of register Ru 1 :CountDesi gnationOperationRFunctionDesti nation nrlrlr~~~The 7-bit operation code of the instruction.(If any byte-string instruction isindirectly addressed, the basi c processortraps to location X l 40 1 at the time of operationcode decoding. )The 4-bit field that identifies register Rof the current general register block.Source Address(cont. )CountDestinationAddressbyte of the source byte string operand.The effective source address is the sourceaddress in register R plus the displacementvalue in the instruction word.An 8-bit field that contains the true count(from 0 to 255) of the number of bytesinvolved in the operation. This field isdecremented by 1 as each byte in thedestination byte string is processed. Ao count means IIno operation ll with respectto the registers and main memory.A 19-bit field that contains the byteaddress of the first (most significant)byte of the destination byte-string operand.This field is incremented by 1 aseach byte in the destination byte stringis processed.In any byte-string instruction, any portion of register Ror Ru1 that is not explicitly defined (i. e., bit positions8-12), should be coded with zeros for real and virtualaddressi ng.Since the value Ru1 is obtained by performing a logicalinclusive OR with the value 0001 and the value of theR field of the instruction word, the two control registersare Rand R + 1 if R is even. However, if R is an odd value,register R contains an address value that functions both as asource operand address and as a destination operand address.Also, if register 0 is designated in any byte-string instruc-... ___ 1 _______ .. ~ ___ TnA ... IC"1 ATe A"'I/""'\ TeC"T n'\rre C"TnT"'I"" ____ IIIVII \CAvCPI IVI "'\r\I'4"'LJ"'IL r\1'4V IL ... I U,I ........'\11'4'\,.7 UIIUEDIT BYTE STRING), its contents are ignored and a zerosource address value is obtained. Thus, the followingthree cases exist for most byte-string instructions, dependingon whether the value of the R field of the instruction wordis even and nonzero, odd, or zero:Case I, R is even and nonzeroThe effective source address is the address in register R plusthe displacement in the instruction word; the destinationaddress is the address in register R + 1, but without thedisplacement added.DisplacementMask/FillSource AddressA 20-bit field that contains a signedbyte displacement va lue, used to forman effective byte address. The displacementvalue is right-justified in the 20-bitfield, and negative values are in twolscomplement form.An 8-bit field used only with TRANSLATEAND TEST BYTE STRING and EDIT BYTESTRING. The purpose of this field isexplained in the detai led discussion ofthe TTBS and EBS instructions.A 19-bit field that normally contains thebyte address of the first (most significant)Case II, R is oddThe effective source address is the address in register R plusthe displacement in the instruction word; the destinationaddress is also the address in register R, but without thedisplacement added.Case III, R is zeroThe effective source address is the displacement value inthe instruction word; the destination address is the addressin register 1. In this case, the source byte-string operandis always a single byte.Byte-String Instructions 87
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Xerox 560 ComputerReference Manual9
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4. INPUT/OUTPUT OPERA TIO NS 142 AG
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1. XEROX 560 COMPUTER SYSTEMINTRODU
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Many operations are performed in fl
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Rapid Context Switching. When respo
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2. SYSTEM ORGANIZATIONThe elements
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FAST MEMORYARITHMETIC AND CONTROL U
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INFORMATION BOUNDARIESBasic process
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(Maximumof eight)Core Core Core Cor
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3. Diagnostic logic. Each memory dr
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eference address field of the instr
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Instruction in memory:Instruction i
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Real-extended addressing is specifi
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Table 1. Basic Processor Operating
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DesignationFunctionDesignationFunct
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InterruptStateDisarmedArmed[$Waitin
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AddressTable 2. Interrupt Locations
Page 41 and 42: is assumed to contain an XPSD or a
Page 43 and 44: Table 3. Summary of Trap LocationsL
Page 45 and 46: TRAP MASKSThe programmer may mask t
Page 47 and 48: PUSH-DOWN STACK LIMIT TRAPPush-down
Page 49 and 50: Instruction Name Mnemonic FaultDeci
Page 51 and 52: subroutine. However, with certain c
Page 53 and 54: 3. INSTRUCTION REPERTOIREThis chapt
Page 55 and 56: CC1 is unchanged by the instruction
Page 57 and 58: Condition code settings:2 3 4 Resul
Page 59 and 60: Example 2, odd R field value:Before
Page 61 and 62: significance (FS), floating zero (F
Page 63 and 64: next sequential register after regi
Page 65 and 66: R 1 R2 R3 MeaningoThe effective vir
Page 69 and 70: MIMULTIPLY IMMEDIATE(Immediate oper
Page 71 and 72: original contents of register R, re
Page 73 and 74: Instruction NameCompare HalfwordMne
Page 77 and 78: 2 3 4 Result of ShiftCircular Shift
Page 79 and 80: 4. At the completion of the left sh
Page 81 and 82: Instruction NameFloating Subtract L
Page 83 and 84: The following table shows the possi
Page 85 and 86: Table 8.Condition Code Settings for
Page 87 and 88: PACKED DECIMAL NUMBERSAll decimal a
Page 89 and 90: DSTDECIMAL STORE(Byte index alignme
Page 91: If no indirect addressing or indexi
Page 95 and 96: Both byte strings are C bytes in le
Page 97 and 98: of the destination byte that caused
Page 99 and 100: again present, unti I a positive or
Page 101 and 102: The new contents of register 7 are:
Page 103 and 104: traps to location X'42 1 as a resul
Page 105 and 106: If there is sufficient space in the
Page 107 and 108: If CC1, or CC3, or both CC1 and CC3
Page 109 and 110: appropriate memory stack locations
Page 111 and 112: II, EI) are generated by II ORing"
Page 113 and 114: In the real extended addressing mod
Page 115 and 116: CAll INSTRUCTIONSEach ofthe four CA
Page 117 and 118: The XPSD instruction' is used for t
Page 119 and 120: If (I)1O = 0, trap or interrupt ins
Page 121 and 122: For either memory map format and ei
Page 123 and 124: initial value plus the initial valu
Page 125 and 126: Table 9. Status Word 0Field Bits Co
Page 127 and 128: READ INTERRUPT INHIBITSThe followin
Page 129 and 130: Table 11.Read Direct Mode 9 Status
Page 131 and 132: SET ALARM INDICATORThe following co
Page 133 and 134: INPUT jOUTPUT INSTRUCTIONSThe I/o i
Page 135 and 136: Table 13.Description of I/o Instruc
Page 137 and 138: Table 15.Device Status Byte (Regist
Page 139 and 140: Table 16. Operational Status Byte (
Page 141 and 142: Table 19.Status Response Bits for A
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If CC4 = 0, the MIOP is in a normal
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2 3 4 Meaningo 0 I/o address not re
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The functions of bits within the DC
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4. Each unit-record controller (int
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Interrupt at Channel End (Bit Posit
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Transfer in Channel. A control lOCO
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Otherwise, the first word of the ne
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Depending upon the characteristics
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change the rate on the primary cons
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Location(hex) (dec)20 3221 3322 342
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Table 22.Diagnostic Control (P-Mode
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at its normal rate (e. g., fixed du
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SET LOW CLOCK MARGINSThis command c
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BP STATUS AND NO.Th i s group of i
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Input5MPri ntout5MFunctionStore X 1
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6. SYSTEM CONFIGURATION CONTROLPool
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Table 25. Functions of Processor Cl
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Table 26. Functions of Memory Unit
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STANDARD 8-BIT COMPUTER CODES (EBCD
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STANDARD SYMBOL-CODE CORRESPONDENCE
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STANDARD SYMBOL-CODE CORRESPONDENCE
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TABLE OF POWERS OF SIXTEEN II162564
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HEXADECIMAL-DECIMAL INTEGER CONVERS
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HEXADECIMAL-DECIMAL FRACTION CONVER
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HEXADECIMAL-DECIMAL FRACTION CONVER
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APPENDIX B.GLOSSARY OF SYMBOLIC TER
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TermMeaningTermMeaningWKxWrite key
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Table C-2. Memory Unit Status Regis
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Y OYf'lV r'f'lrnf'lrtil"\n'''' ....
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