4. INPUT jOUTPUT OPERATIONSTo accommodate the variety and number of I/o devi ceswhich may be required for scientific and commercial applications,a Xerox <strong>560</strong> <strong>computer</strong> <strong>system</strong> may include the following:External Direct Input/Output (DIO) interface,Multiplexor Input/Output Processors (MIOPs), and RotatingMemory Processors (RMPs).more of the following types of device controllers may beconnected to an MIOP:<strong>1.</strong> Single-unit device controller {internal or external}.2. Multi-unit device controller {internal or external}."3. Unit-record controller {internal or external}.EXTERNAL DlO INTERFACEAn external DIO interface permits standard and speciallydesigned I/O devices to perform I/O operations (normallyin a real-time environment) that are controlled directly bythe basic processor (BP). Appropriate control signals andup to one word {32 bi ts} of data may be exchanged betweenthe BP and an addressed I/O device for each READ DIRECTor WRITE DIRECT instruction executed by the BP.During a WRITE DIRECT instruction (Mode 2 through F),the BP holds the control and data-lines stable until anacknowledgment signal is received from the addressed I/Odevice. During a READ DIRECT instruction (Mode 2through F), the BP holds the control lines stable until theaddressed I/o device furnishes the data accompanied withan acknowledgment signa/. Any delay encountered inreceiving the acknowledgment signal, for either READDIRECT or WRITE DIRECT instructions, does not have anadverse effect upon I/O operations being performed bythe MIOP or RMP <strong>system</strong>s.Refer to Xerox publication 90 09 73 {Interface DesignManual} for further detai Is pertaining to the external DIOinterface. Also, refer to appropriate peripheral referencemanuals for details on control and data signals.MULTIPLEXOR INPUT/OUTPUT PROCESSOR (MIOP)An MIOP permits standard and commercially available I/Odevices (e. g., card readers, card punches, magnetic tapeunits, etc.) to be controlled primari Iy by individual I/Osubchannels within the MIOP and associated device controllers.Depending upon the number of I/o subchannelsassigned (maximum of 16, as described under II Device Controllers"),an equivalent number of I/O operations may beperformed si mu I taneously.Generally, an internal device controller is physically connectedvia the internal I/o interface.An external device controller is located remotely to theMIOP and may require one or more separate chassis to accommodateit.A single-unit device controller {internal or external} isspecifically designed to control only one I/o device,usually a unit-record device such as a card reader, a cardpunch, or a line printer. Characteristics of a single-unitdevice controller are dependent upon the device controlled.(Refer to an appropriate peripheral reference manual forfurther information. )A multi -unit device controller (internal or external) isspecially designed to control more than one I/o device,where all the I/O devices are of the same type {e. g.,magnetic tape units or RADs}. However, only one I/odevice at a time may be actively involved in a data transferoperation. Characteristics of a multi-unit device controllerare dependent upon the I/O devices controlled. Forexample, a multi -unit device controller for magnetic tapeunits may control up to eight units. (Refer to an appropriateperipheral reference manual for further information.)Unit-record controllers {internal or external} are designedto control up to eight unit record type of I/O devi ces (e. g. ,card readers; card PlJnches; line printers). AI! I/o devicesattached to a unit-record controller need not be ofthe same type. All I/o devices attached to a unit-recordcontroller may perform separate I/O operations, includingdata transfers, si mu I taneously.<strong>The</strong> number of device controllers, as well as the number ofI/O devices, that may be connected to an MIOP is dependentupon the following considerations:<strong>1.</strong> <strong>The</strong> maximum number of I/O subchannels within anMIOP is 16.DEVICE CONTROLLERSAll I/O devices associated with an MIOP are connectedvia an appropriate device controller. Depending upon thenumber and type of I/o devices to be connected, one or2. Each single-unit device controller {internal or external}requires one I/o subchannel.3. Each multi-unit device controller (internal or external)requires one of the first eight subchannels withinthe MIOP.142 Input/Output Operati ons
4. Each unit-record controller (internal or external)requires one I/O subchannel per each unit record deviceattached, up to a maximum of eight.5. <strong>The</strong> maximum number of internal device controllerswithin an MIOP is eight (where a unit-record devicecontroller is equivalent to one, regardless of thenumber of assigned subchannels).6. Any I/O subchannel not assigned to an internal devicecontroller may be assigned to an external device controller.Thus, if an MIOP has no internal device controller,all 16 I/O subchannels may be assigned toexternal device controllers.ROTATING MEMORY PROCESSOR (RMP)Each RMP is a speci_al purpose, single-channel lOP designedto enhance high-speed data transfers between main memoryand anyone of up to eight disk units. Functionally, anRMP is comparable to an MIOP, except: (1) at any giventime, only one disk unit may be selected for a data transferoperation, . (2) data transfer rate of disk units are generallyhigher than data transfer rates of I/O devices attached toan MIOP, and (3) the device controller function is performedby the RMP, hence disk units are connected directlyto the RMP rather than via a device controller. (Note:Although only one disk unit may be actively transferdngdata at any given time, the other units may be active inperforming control functions, e. g., seeking).2. Depending upon various programming considerations,the command list may be contained within one or moreareas of memory and each area may be comprised ofone or more I/O command doublewords (IOCDs).3. Command list continuity between 10CDs relating to thesame logical record or to the same logical file may bespecified (see "Data Chain Flag" and "Command ChainFlag ll under II Operationa I 10CDs"). Command listcontinuity between portions of a command list locatedin different areas of main memory may be accomplishedby including a control 10CD within the command list(see "Transfer in Channel II under "Control 10CDs").4. Each 10CD is comprised of two words in contiguousmemory word locations. <strong>The</strong> first word must be storedin an even memory word location and the second wordmust be stored in the next consecutive (odd) memoryword location. Each IOCD is either an operationalIOCD or a control IOCD and contains coded parametersto define either a complete I/Ooperation or an integralportion of an I/Ooperation. (See "Operational IOCD"and IIControl IOCD" for further detai Is. )OPERATIONAL lOCOAn operational IOCD may contain up to five fields ofparameters, as required, to define either an entire I/o operationor an integral portion of an I/o operation._ <strong>The</strong>general format and description of parameters containedwithin an operational 10CD are as follows:iNPUT jOUTPUT PKOCESSOR liOfij FUNUAMENTAlSThis section contains general information, programming concepts,and definition of terms pertaining to I/O operationsperformed by Input/Output Processors (i. e., MIOP andRMP <strong>system</strong>s). <strong>The</strong> large variety of I/O devices which maybe used with these lOPs precludes a detailed or exhaustivedescription of features which are unique to each device.Likewise, a general reference "Refer to an appropriateXerox peripheral reference manual" is made rather thanciting specific manuals.Within this manual, the following terminology is used todifferentiate the hierarchy of control during an I/o operation:<strong>The</strong> BP executes instructions, the lOPs execute commands,and the device controller/device execute orders.COMMAND LISTEach I/O operation performed by an lOP must be definedby a command list. <strong>The</strong> characteristics and requirements ofa command list are as follows:<strong>1.</strong> It is normally created by a BP-executed programprior to the time that the defined I/o operation isinitiated. It must reside in main memory when the I/ooperation is initiated and subsequently executed.ORDERThis 8-bit field (bit positions 0-7), if required, may becoded to specify either an input or an output order that isexecuted by the device controller/device. General codingformats and functions of typical I/o orders are listed below:Bit Positiono 1 2 3 4 5 6 7 Order FunctionMMMMMM01MMMMMM10MMMMMM11MMMMOMMMM10000WriteReadControlSenseReadBackwardOutput operationInput operationOutput controlinformationInput control informationInput data, in reversesequenceRotating Memory Processor (RMP)/Input/Output Processor (lOP) Fundamentals 143
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Xerox 560 ComputerReference Manual9
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4. INPUT/OUTPUT OPERA TIO NS 142 AG
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1. XEROX 560 COMPUTER SYSTEMINTRODU
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Many operations are performed in fl
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Rapid Context Switching. When respo
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2. SYSTEM ORGANIZATIONThe elements
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FAST MEMORYARITHMETIC AND CONTROL U
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INFORMATION BOUNDARIESBasic process
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(Maximumof eight)Core Core Core Cor
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3. Diagnostic logic. Each memory dr
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eference address field of the instr
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Instruction in memory:Instruction i
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Real-extended addressing is specifi
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Table 1. Basic Processor Operating
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DesignationFunctionDesignationFunct
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InterruptStateDisarmedArmed[$Waitin
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AddressTable 2. Interrupt Locations
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is assumed to contain an XPSD or a
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Table 3. Summary of Trap LocationsL
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TRAP MASKSThe programmer may mask t
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PUSH-DOWN STACK LIMIT TRAPPush-down
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Instruction Name Mnemonic FaultDeci
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subroutine. However, with certain c
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3. INSTRUCTION REPERTOIREThis chapt
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CC1 is unchanged by the instruction
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Condition code settings:2 3 4 Resul
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Example 2, odd R field value:Before
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significance (FS), floating zero (F
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next sequential register after regi
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R 1 R2 R3 MeaningoThe effective vir
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Condition code settings:2 3 4 Resul
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MIMULTIPLY IMMEDIATE(Immediate oper
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original contents of register R, re
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Instruction NameCompare HalfwordMne
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Condition code settings:2 3 4 Resul
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2 3 4 Result of ShiftCircular Shift
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4. At the completion of the left sh
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Instruction NameFloating Subtract L
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The following table shows the possi
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Table 8.Condition Code Settings for
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PACKED DECIMAL NUMBERSAll decimal a
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DSTDECIMAL STORE(Byte index alignme
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If no indirect addressing or indexi
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Instruction NameMnemonicDesignation
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Both byte strings are C bytes in le
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- Page 115 and 116: CAll INSTRUCTIONSEach ofthe four CA
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- Page 125 and 126: Table 9. Status Word 0Field Bits Co
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- Page 129 and 130: Table 11.Read Direct Mode 9 Status
- Page 131 and 132: SET ALARM INDICATORThe following co
- Page 133 and 134: INPUT jOUTPUT INSTRUCTIONSThe I/o i
- Page 135 and 136: Table 13.Description of I/o Instruc
- Page 137 and 138: Table 15.Device Status Byte (Regist
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- Page 141 and 142: Table 19.Status Response Bits for A
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- Page 155 and 156: Otherwise, the first word of the ne
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- Page 159 and 160: change the rate on the primary cons
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- Page 163 and 164: Table 22.Diagnostic Control (P-Mode
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- Page 169 and 170: BP STATUS AND NO.Th i s group of i
- Page 171 and 172: Input5MPri ntout5MFunctionStore X 1
- Page 173 and 174: 6. SYSTEM CONFIGURATION CONTROLPool
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- Page 177: Table 26. Functions of Memory Unit
- Page 180 and 181: STANDARD 8-BIT COMPUTER CODES (EBCD
- Page 182 and 183: STANDARD SYMBOL-CODE CORRESPONDENCE
- Page 184 and 185: STANDARD SYMBOL-CODE CORRESPONDENCE
- Page 186 and 187: TABLE OF POWERS OF SIXTEEN II162564
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APPENDIX B.GLOSSARY OF SYMBOLIC TER
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TermMeaningTermMeaningWKxWrite key
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Table C-2. Memory Unit Status Regis
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Y OYf'lV r'f'lrnf'lrtil"\n'''' ....
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