1. xerox 560 computer system - The UK Mirror Service

Bits 0-24 of register 1 are cleared and the remaining countis loaded into bits 25-31. If the initial contents of bit 0is equal to I, then no bits are shifted by the instruction.In this case the original count in the instruction is storedin register 1.Searching shift causing a change in bit position 0 causesCC2 to be set to 1. If bit position 0 is not changed duringa searching shift, CC2 is cleared. CC4 is set to 1 if theshift is terminated with a 1 in bit position O.Affected: (R), (Rl), CC2, CC4Searching Shift, Double RegisterThe searching shift is circular in either direction. If theshift count, C, is positive, the contents of registers RandRul are shifted left C bit positions or until a 1 appears inbit position 0 of register R. If C is negative, the contentsare shifted right lei positions or unti I a 1 appears in bitposition O. When the shift is terminated, the remainingcount is stored in register I, which is dedicated to thesearching shift instruction. Bits 0-24 of register 1 arecleared and the remaining count is loaded into bits 25-31.Searching shift causing a change in bit position 0 causesCC2 to be set to 1. If bit position 0 is not changed duringa searching shift, CC2 is cleared. CC4 is set to 1 if theshift is terminated with a 1 in bit position O.Affected: (R), (Rul), (Rl), CC2, CC4If direct addressing and indexing are called for in theinstruction, bit 23 of the reference address (not affectedby subsequent indexing) determines the type of shift.Bits 25-31 of the reference address plus bits 25-31 of thespecified indexed register determine the direction andamount of the shift.If indirect addressing and indexing are called for in the instruction,bits 15-31 of the reference address are used toaccess the indirect word. Bit 23 of the indirect word (notaffected by subsequent indexing) determines the type ofshift. Bits 25-31 of the indirect address plus bits 25-31 ofthe specified index register determine the direction andamount of the shift.The shift count, C, in bit positions 25-31 of the effectivevirtual address determines the amount and direction ofthe shift. The shift count is treated as a 7-bit signedbinary integer, with the high-order bit (bit position 25) asthe sign (negative integers are represented in two's complementform).The absolute value of the shift count determines the numberof hexadecimal digit positions the floating-point number isto be shifted. If the shift count is positive, the floatingpointnumber is shifted left; if the count is negative, thenumber is shifted right.SHIFT FLOATING loads the floating-point number from theregister(s) specified by the R field of the instruction into aset of internal registers. If the number is negative, itis twols complemented. A record of the original sign isretained. The floating-point number is then separated intoa characteristic and a fraction, and CCI and CC2 are bothreset to OIS.A positive shift count produces the following left shiftoperations:FLOATING-POINT SHIFTFloating-point numbers are defined in the IIFloating­Point Arithmetic Instructions ll section. The format for the&I~_": _____ :_,, _L:C" : __ L_ •• _": __ : __IIV,",III'~-tJVlIlI ~'IIII II'~IIU"""VII ,~;SFSHIFT FLOATING(Word index alignment)If direct addressing and no indexing is called for in the instructionSHIFT FLOATING, bit position 23 of the referenceaddress field determines the type (long or short format) ofshift, and bit positions 25-31 determine the direction andamount of the shift.If indirect addressing and no indexing is called for in theinstruction, bit positions 15-31 of the instruction are usedto access the indirect word and then bit positions 23 and25-31 of the indirect word determine the type, direction,and amount of the shift.1. If the fraction is normalized (i. e., is less than 1 andis equal to or greater than 1/16), or the fraction isall OIS, CCl is set to 1.,.. 1'1: LL _ r. __ _ L- r-. '.1 -_ II ".... •• rl .-L. 11 HIt:: IrU~lIon rlt::IU I:> UII V:>, rn~ enflr~ flouflng-polnTnumber is set to all OIS (lltrue ll zero), regardless of thesign and the characteristic of the original number.3. If the fraction is not normalized, the fraction field isshifted 1 hexadecimal digit position (4 bit positions) tothe left and the characteristic field is decrementedby 1. Vacated digit positions at the right of the fractionare fi lied with hexadecimal OIS.If the characteristic field underflows (i.e., is all lisas the result of being decremented), CC2 is set to 1.However, if the characteristic field does not underfiow,the shift process (shift fraction, and decrementcharacteristic) continues until the fraction isnormalized, unti I the characteristic field underflows,or unti I the fraction is shifted left C hexadecimaldigit positions, whichever occurs first. (Any two,or all three, of the terminating conditions can occursimultaneously. )72 Shift Instructions