BSIM3v3.2.2 MOSFET Model - The University of Texas at Dallas

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Non-Uniform Doping and Small Channel Effects on Threshold VoltageFirst, if the gate voltage is greater than the threshold voltage, the inversion chargedensity is larger than the substrate doping concentration and MOSFET is operatingin the strong inversion region and drift current is dominant. Second, if the gatevoltage is smaller than V th , the inversion charge density is smaller than thesubstrate doping concentration. The transistor is considered to be operating in theweak inversion (or subthreshold) region. Diffusion current is now dominant [2].Lastly, if the gate voltage is very close to V th , the inversion charge density is closeto the doping concentration and the MOSFET is operating in the transition region.In such a case, diffusion and drift currents are both important.For MOSFET’s with long channel length/width and uniform substrate dopingconcentration, V th is given by [2]:Vth= V +Φ + γ Φ −V= V + γFBssbsTideal( Φ −V− Φ )(2.1.1)where V FB is the flat band voltage, V Tideal is the threshold voltage of the longchannel device at zero substrate bias, and γ is the body bias coefficient and is givenby:sbssεγ = 2 siqNaCox(2.1.2)where N a is the substrate doping concentration. The surface potential is given by:(2.1.3)ΦskBT= 2q⎛ Nln⎜⎝ nia⎞⎟⎠2-2 BSIM3v3.2.2 Manual Copyright © 1999 UC Berkeley
Non-Uniform Doping and Small Channel Effects on Threshold VoltageEquation (2.1.1) assumes that the channel is uniform and makes use of the onedimensional Poisson equation in the vertical direction of the channel. This modelis valid only when the substrate doping concentration is constant and the channellength is long. Under these conditions, the potential is uniform along the channel.Modifications have to be made when the substrate doping concentration is notuniform and/or when the channel length is short, narrow, or both.2.1.1 Vertical Non-Uniform Doping EffectThe substrate doping profile is not uniform in the vertical direction asshown in Figure 2-1.N chN subFigure 2-1. Actual substrate doping distribution and its approximation.The substrate doping concentration is usually higher near the Si/SiO 2interface (due to V th adjustment) than deep into the substrate. Thedistribution of impurity atoms inside the substrate is approximately a halfBSIM3v3.2.2 Manual Copyright © 1999 UC Berkeley 2-3
Page 1 and 2: BSIM3v3.2.2 MOSFET ModelUsers’ Ma
Page 5 and 6: Table of ContentsCHAPTER 1: Introdu
Page 7 and 8: CHAPTER 6: Parameter Extraction 6-1
Page 9 and 10: APPENDIX C: References C-1APPENDIX
Page 11 and 12: CHAPTER 1: Introduction1.1 General
Page 16 and 17: Non-Uniform Doping and Small Channe
Page 28 and 29: Mobility Modelµeffµ=01 + ( E E )e
Page 30 and 31: Bulk Charge Effectµ eff Ev = , E <
Page 32 and 33: Strong Inversion Drain Current (Lin
Page 34 and 35: Strong Inversion Current and Output
Page 42 and 43: Subthreshold Drain CurrentV1 PSCBE2
Page 44 and 45: Effective Channel Length and Widthd
Page 46 and 47: Poly Gate Depletion EffectNgateFigu
Page 48 and 49: Poly Gate Depletion Effect1.00Tox=8
Page 50 and 51: Poly Gate Depletion EffectBSIM3v3.2
Page 52 and 53: Poly Gate Depletion Effect2-40 BSIM
Page 54 and 55: Unified Channel Charge Density Expr
Page 56 and 57: Unified Channel Charge Density Expr
Page 58 and 59: Unified Mobility Expression∆QVF(
Page 60 and 61: Unified Linear Current ExpressionI=
Page 62 and 63: Unified Vdsat ExpressionLet V ds =V
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Single Current Expression for All O
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KAPITEL 7RESULTAT OCH REKOMMENDATIO
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CHAPTER 4: Capacitance ModelingAccu
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Geometry Definition for C-V Modelin
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Methodology for Intrinsic Capacitan
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Charge-Thickness Capacitance Modelp
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Charge-Thickness Capacitance Modelw
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Extrinsic CapacitanceFigure 4-4 ill
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Extrinsic Capacitance2( V + δ ) 4
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CHAPTER 5: Non-Quasi Static Model5.
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Model FormulationFigure 5-1. Quasi-
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Model Formulationwhere elm is the E
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Model Formulationwhere i represents
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CHAPTER 6: Parameter ExtractionPara
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Extraction ProcedureWOrthogonal Set
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Extraction ProcedureInitial Guess o
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Extraction Procedureoptimization. (
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Extraction ProcedureStep 7Extracted
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Extraction ProcedureB0, B1Fitting T
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Extraction ProcedureStep 20Extracte
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Notes on Parameter Extraction6.4.2
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Notes on Parameter ExtractionnC-1.
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CHAPTER 6: Parameter ExtractionPara
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Extraction ProcedureWOrthogonal Set
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Extraction ProcedureInitial Guess o
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Extraction Procedureoptimization. (
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Extraction ProcedureStep 7Extracted
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Extraction ProcedureB0, B1Fitting T
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Extraction ProcedureStep 20Extracte
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Notes on Parameter Extraction6.4.2
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Notes on Parameter ExtractionnC-1.
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CHAPTER 7: Benchmark Test ResultsA
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Benchmark Test ResultsIds (A)1.E-02
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Benchmark Test Resultsgm/Ids (mho/A
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CHAPTER 8: Noise Modeling8.1 Flicke
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Flicker NoiseNlC=ox( V −V− min(
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Noise Model Flag8.3 Noise Model Fla
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CHAPTER 9: MOS Diode Modeling9.1 Di
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Diode IV ModelJssw= Js0sw⎛ E⎜
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MOS Diode Capacitance Model9.1.3 Mo
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MOS Diode Capacitance Model(9.18)Cj
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MOS Diode Capacitance Model(9.26)Cj
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MOS Diode Capacitance Model(9.32)
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APPENDIX A: Parameter ListA.1 Model
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DC ParametersSymbolsused inequation
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C-V Model ParametersSymbolsused ine
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dW and dL ParametersA.5 dW and dL P
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Temperature ParametersSymbolsused i
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Process ParametersSymbolsused inequ
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Model Parameter NotesK2( γ1−γ)(
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Model Parameter NotesCgdo = dlc * C
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APPENDIX B: Equation ListB.1 I-V Mo
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I-V ModelC C V C V D L effDL effdsc
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I-V ModelEsatsat= 2νµ effB.1.5 Ef
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I-V ModelB.1.8 Polysilicon Depletio
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Capacitance Model EquationsTRdsw( T
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Capacitance Model EquationsB.2.2.2
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Capacitance Model EquationsQ inv= 0
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Capacitance Model Equationsif (V ds
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Capacitance Model Equations⎡Q W L
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Capacitance Model EquationsVgsteff
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Capacitance Model Equations(i) 50/5
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Capacitance Model EquationsAbulk0
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Capacitance Model Equations(3) capM
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Capacitance Model EquationsδQsub=
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APPENDIX C: References[1] G.S. Gild
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[18] M.C. Jeng, "Design and Modelin
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[35] K.K. Hung et al, “A Physics-
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APPENDIX D: Model Parameter Binning
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AC and Capacitance ParametersD.3 AC
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NQS ParametersD.4 NQS ParametersSym
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Temperature ParametersD.6 Temperatu
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Process ParametersSymbolsused inequ
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