BSIM3v3.2.2 MOSFET Model - The University of Texas at Dallas

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Temperature ParametersSymbolsused inequationSymbolsused inSPICEDescription Default Unit NoteLwc Lwc Coefficient of width dependencefor CV channel lengthoffsetLwlc Lwlc Coefficient of length and widthdependencefor CV channellength offsetWlc Wlc Coefficient of length dependencefor CV channel widthoffsetWwc Wwc Coefficient of widthdependencefor CV channel width offsetWwlc Wwlc Coefficient of length and widthdependencefor CV channelwidth offsetLwLwlWlWwWwlm Lwnm Lwn+Llnm Wlnm Wwnm Wln+WwnA.6 Temperature ParametersSymbolsused inequationSymbolsused inSPICETnom tnom Temperature at which parametersare extractedDescription Default Unit Note27o Cµte ute Mobility temperature exponent-1.5 noneA-10 BSIM3v3.2.2 Manual Copyright © 1999 UC Berkeley
Temperature ParametersSymbolsused inequationSymbolsused inSPICEDescription Default Unit NoteKt1 kt1 Temperature coefficient forthreshold voltageKt1l kt1l Channel length dependence ofthe temperature coefficient forthreshold voltageKt2 kt2 Body-bias coefficient of Vthtemperature effect-0.11 V0.0 Vm0.022 noneUa1 ua1 Temperature coefficient forUa4.31E-9m/VUb1 ub1 Temperature coefficient forUbUc1 uc1 Temperature coefficient forUcAt at Temperature coefficient forsaturation velocityPrt prt Temperature coefficient forRdswAt at Temperature coefficient forsaturation velocitynj nj Emission coefficient of junctionXTI xti Junction current temperatureexponent coefficient-7.61E-18mob-Mod=1,2:-5.6E-11mob-Mod=3:-0.056(m/V) 2m/V 21/V3.3E4 m/sec0.0 Ω-µm3.3E4 m/sec1.0 none3.0 noneBSIM3v3.2.2 Manual Copyright © 1999 UC Berkeley A-11
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BSIM3v3.2.2 MOSFET ModelUsers’ Ma
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Table of ContentsCHAPTER 1: Introdu
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CHAPTER 6: Parameter Extraction 6-1
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APPENDIX C: References C-1APPENDIX
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CHAPTER 1: Introduction1.1 General
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Non-Uniform Doping and Small Channe
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Mobility Modelµeffµ=01 + ( E E )e
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Bulk Charge Effectµ eff Ev = , E <
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Strong Inversion Drain Current (Lin
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Strong Inversion Current and Output
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Subthreshold Drain CurrentV1 PSCBE2
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Effective Channel Length and Widthd
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Poly Gate Depletion EffectNgateFigu
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Poly Gate Depletion Effect1.00Tox=8
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Poly Gate Depletion EffectBSIM3v3.2
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Poly Gate Depletion Effect2-40 BSIM
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Unified Channel Charge Density Expr
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Unified Channel Charge Density Expr
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Unified Mobility Expression∆QVF(
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Unified Linear Current ExpressionI=
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Unified Vdsat ExpressionLet V ds =V
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Single Current Expression for All O
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KAPITEL 7RESULTAT OCH REKOMMENDATIO
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CHAPTER 4: Capacitance ModelingAccu
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Geometry Definition for C-V Modelin
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Methodology for Intrinsic Capacitan
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Charge-Thickness Capacitance Modelp
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Charge-Thickness Capacitance Modelw
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Extrinsic CapacitanceFigure 4-4 ill
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Extrinsic Capacitance2( V + δ ) 4
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CHAPTER 5: Non-Quasi Static Model5.
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Model FormulationFigure 5-1. Quasi-
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Model Formulationwhere elm is the E
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Model Formulationwhere i represents
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CHAPTER 6: Parameter ExtractionPara
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Extraction ProcedureWOrthogonal Set
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Extraction ProcedureInitial Guess o
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Extraction Procedureoptimization. (
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Extraction ProcedureStep 7Extracted
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Extraction ProcedureB0, B1Fitting T
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Extraction ProcedureStep 20Extracte
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Notes on Parameter Extraction6.4.2
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Notes on Parameter ExtractionnC-1.
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CHAPTER 6: Parameter ExtractionPara
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Extraction ProcedureWOrthogonal Set
Page 121 and 122: Extraction ProcedureInitial Guess o
Page 123 and 124: Extraction Procedureoptimization. (
Page 125 and 126: Extraction ProcedureStep 7Extracted
Page 127 and 128: Extraction ProcedureB0, B1Fitting T
Page 129 and 130: Extraction ProcedureStep 20Extracte
Page 131 and 132: Notes on Parameter Extraction6.4.2
Page 133 and 134: Notes on Parameter ExtractionnC-1.
Page 135 and 136: CHAPTER 7: Benchmark Test ResultsA
Page 137 and 138: Benchmark Test ResultsIds (A)1.E-02
Page 141 and 142: Benchmark Test Resultsgm/Ids (mho/A
Page 145 and 146: CHAPTER 8: Noise Modeling8.1 Flicke
Page 147 and 148: Flicker NoiseNlC=ox( V −V− min(
Page 149 and 150: Noise Model Flag8.3 Noise Model Fla
Page 151 and 152: CHAPTER 9: MOS Diode Modeling9.1 Di
Page 153 and 154: Diode IV ModelJssw= Js0sw⎛ E⎜
Page 155 and 156: MOS Diode Capacitance Model9.1.3 Mo
Page 157 and 158: MOS Diode Capacitance Model(9.18)Cj
Page 159 and 160: MOS Diode Capacitance Model(9.26)Cj
Page 161 and 162: MOS Diode Capacitance Model(9.32)
Page 163 and 164: APPENDIX A: Parameter ListA.1 Model
Page 165 and 166: DC ParametersSymbolsused inequation
Page 169 and 170: C-V Model ParametersSymbolsused ine
Page 171: dW and dL ParametersA.5 dW and dL P
Page 175 and 176: Process ParametersSymbolsused inequ
Page 177 and 178: Model Parameter NotesK2( γ1−γ)(
Page 179 and 180: Model Parameter NotesCgdo = dlc * C
Page 181 and 182: APPENDIX B: Equation ListB.1 I-V Mo
Page 183 and 184: I-V ModelC C V C V D L effDL effdsc
Page 185 and 186: I-V ModelEsatsat= 2νµ effB.1.5 Ef
Page 187 and 188: I-V ModelB.1.8 Polysilicon Depletio
Page 189 and 190: Capacitance Model EquationsTRdsw( T
Page 191 and 192: Capacitance Model EquationsB.2.2.2
Page 193 and 194: Capacitance Model EquationsQ inv= 0
Page 195 and 196: Capacitance Model Equationsif (V ds
Page 197 and 198: Capacitance Model Equations⎡Q W L
Page 199 and 200: Capacitance Model EquationsVgsteff
Page 201 and 202: Capacitance Model Equations(i) 50/5
Page 203 and 204: Capacitance Model EquationsAbulk0
Page 205 and 206: Capacitance Model Equations(3) capM
Page 207 and 208: Capacitance Model EquationsδQsub=
Page 209 and 210: APPENDIX C: References[1] G.S. Gild
Page 211 and 212: [18] M.C. Jeng, "Design and Modelin
Page 213 and 214: [35] K.K. Hung et al, “A Physics-
Page 215 and 216: APPENDIX D: Model Parameter Binning
Page 221 and 222: AC and Capacitance ParametersD.3 AC
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NQS ParametersD.4 NQS ParametersSym
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Temperature ParametersD.6 Temperatu
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Process ParametersSymbolsused inequ
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