BSIM3v3.2.2 MOSFET Model - The University of Texas at Dallas

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AC and Capacitance ParametersSymbolsused inequationSymbolsused inSPICEDescriptionCKAPPA ckappa Coefficient for lightly dopedregion overlapcapacitance Fringing fieldcapacitanceYESCf cf fringing field capacitance YESCLC clc Constant term for the short YESchannel modelCLE cle Exponential term for the short YESchannel modelDLC dlc Length offset fitting parameterYESfrom C-VDWC dwc Width offset fitting parameter YESfrom C-VVfbcv vfbcv Flat-band voltage parameter YES(for capMod = 0 only)noff noff CV parameter in Vgsteff,CV YESfor weak to strong inversionvoffcv voffcv CV parameter in Vgsteff,CV YESfor weak to strong inversionacde acde Exponential coefficient forcharge thickness in capMod=3for accumulation and depletionregionsYESmoin moin Coefficient for the gate-biasdependent surface potentialCan BeBinned?YESBSIM3v3.2.2 Manual Copyright © 1999 UC Berkeley D-8
NQS ParametersD.4 NQS ParametersSymbolsused inequationSymbolsused inSPICEDescriptionCan BeBinned?Elm elm Elmore constant of the channel YESD.5 dW and dL ParametersSymbolsused inequationSymbolsused inSPICEDescriptionCan BeBinned?Wl wl Coefficient of length dependencefor width offsetWln wln Power of length dependence ofwidth offsetWw ww Coefficient of width dependencefor width offsetWwn wwn Power of width dependence ofwidth offsetWwl wwl Coefficient of length and widthcross term for width offsetLl ll Coefficient of length dependencefor length offsetLln lln Power of length dependence forlength offsetNONONONONONONOBSIM3v3.2.2 Manual Copyright © 1999 UC Berkeley D-9
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BSIM3v3.2.2 MOSFET ModelUsers’ Ma
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Table of ContentsCHAPTER 1: Introdu
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CHAPTER 6: Parameter Extraction 6-1
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APPENDIX C: References C-1APPENDIX
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CHAPTER 1: Introduction1.1 General
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Non-Uniform Doping and Small Channe
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Mobility Modelµeffµ=01 + ( E E )e
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Bulk Charge Effectµ eff Ev = , E <
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Strong Inversion Drain Current (Lin
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Strong Inversion Current and Output
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Subthreshold Drain CurrentV1 PSCBE2
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Effective Channel Length and Widthd
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Poly Gate Depletion EffectNgateFigu
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Poly Gate Depletion Effect1.00Tox=8
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Poly Gate Depletion EffectBSIM3v3.2
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Poly Gate Depletion Effect2-40 BSIM
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Unified Channel Charge Density Expr
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Unified Channel Charge Density Expr
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Unified Mobility Expression∆QVF(
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Unified Linear Current ExpressionI=
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Unified Vdsat ExpressionLet V ds =V
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Single Current Expression for All O
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KAPITEL 7RESULTAT OCH REKOMMENDATIO
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CHAPTER 4: Capacitance ModelingAccu
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Geometry Definition for C-V Modelin
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Methodology for Intrinsic Capacitan
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Charge-Thickness Capacitance Modelp
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Charge-Thickness Capacitance Modelw
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Extrinsic CapacitanceFigure 4-4 ill
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Extrinsic Capacitance2( V + δ ) 4
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CHAPTER 5: Non-Quasi Static Model5.
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Model FormulationFigure 5-1. Quasi-
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Model Formulationwhere elm is the E
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Model Formulationwhere i represents
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CHAPTER 6: Parameter ExtractionPara
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Extraction ProcedureWOrthogonal Set
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Extraction ProcedureInitial Guess o
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Extraction Procedureoptimization. (
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Extraction ProcedureStep 7Extracted
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Extraction ProcedureB0, B1Fitting T
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Extraction ProcedureStep 20Extracte
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Notes on Parameter Extraction6.4.2
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Notes on Parameter ExtractionnC-1.
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CHAPTER 6: Parameter ExtractionPara
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Extraction ProcedureWOrthogonal Set
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Extraction ProcedureInitial Guess o
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Extraction Procedureoptimization. (
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Extraction ProcedureStep 7Extracted
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Extraction ProcedureB0, B1Fitting T
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Extraction ProcedureStep 20Extracte
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Notes on Parameter Extraction6.4.2
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Notes on Parameter ExtractionnC-1.
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CHAPTER 7: Benchmark Test ResultsA
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Benchmark Test ResultsIds (A)1.E-02
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Benchmark Test Resultsgm/Ids (mho/A
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CHAPTER 8: Noise Modeling8.1 Flicke
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Flicker NoiseNlC=ox( V −V− min(
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Noise Model Flag8.3 Noise Model Fla
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CHAPTER 9: MOS Diode Modeling9.1 Di
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Diode IV ModelJssw= Js0sw⎛ E⎜
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MOS Diode Capacitance Model9.1.3 Mo
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MOS Diode Capacitance Model(9.18)Cj
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MOS Diode Capacitance Model(9.26)Cj
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MOS Diode Capacitance Model(9.32)
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APPENDIX A: Parameter ListA.1 Model
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DC ParametersSymbolsused inequation
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DC ParametersSymbolsused inequation
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C-V Model ParametersSymbolsused ine
Page 171 and 172: dW and dL ParametersA.5 dW and dL P
Page 173 and 174: Temperature ParametersSymbolsused i
Page 175 and 176: Process ParametersSymbolsused inequ
Page 177 and 178: Model Parameter NotesK2( γ1−γ)(
Page 179 and 180: Model Parameter NotesCgdo = dlc * C
Page 181 and 182: APPENDIX B: Equation ListB.1 I-V Mo
Page 183 and 184: I-V ModelC C V C V D L effDL effdsc
Page 185 and 186: I-V ModelEsatsat= 2νµ effB.1.5 Ef
Page 187 and 188: I-V ModelB.1.8 Polysilicon Depletio
Page 189 and 190: Capacitance Model EquationsTRdsw( T
Page 191 and 192: Capacitance Model EquationsB.2.2.2
Page 193 and 194: Capacitance Model EquationsQ inv= 0
Page 195 and 196: Capacitance Model Equationsif (V ds
Page 197 and 198: Capacitance Model Equations⎡Q W L
Page 199 and 200: Capacitance Model EquationsVgsteff
Page 201 and 202: Capacitance Model Equations(i) 50/5
Page 203 and 204: Capacitance Model EquationsAbulk0
Page 205 and 206: Capacitance Model Equations(3) capM
Page 207 and 208: Capacitance Model EquationsδQsub=
Page 209 and 210: APPENDIX C: References[1] G.S. Gild
Page 211 and 212: [18] M.C. Jeng, "Design and Modelin
Page 213 and 214: [35] K.K. Hung et al, “A Physics-
Page 215 and 216: APPENDIX D: Model Parameter Binning
Page 217 and 218: DC ParametersSymbolsused inequation
Page 219 and 220: DC ParametersSymbolsused inequation
Page 221: AC and Capacitance ParametersD.3 AC
Page 225 and 226: Temperature ParametersD.6 Temperatu
Page 227 and 228: Process ParametersSymbolsused inequ
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BSIM3v3.2.2 MOSFET Model - The University of Texas at Dallas

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