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Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005DAADecimal Adjust after AdditionAdjusts the value in the AL register into a packed BCD result <strong>and</strong> sets the CF <strong>and</strong> AFflags in the rFLAGS register to indicate a decimal carry out of either nibble of AL.Use this instruction to adjust the result of a byte ADD instruction that performed thebinary addition of one 2-digit packed BCD values to another.The instruction performs the adjustment by adding 06h to AL if the lower nibble isgreater than 9 or if AF = 1. Then 60h is added to AL if the original AL was greater than99h or if CF = 1.If the lower nibble of AL was adjusted, the AF flag is set to 1. Otherwise AF is notmodified. If the upper nibble of AL was adjusted, the CF flag is set to 1. Otherwise, CFis not modified. SF, ZF, <strong>and</strong> PF are set according to the final value of AL.Using this instruction in 64-bit mode generates an invalid-opcode (#UD) exception.Mnemonic Opcode DescriptionDAA 27Decimal adjust AL.(Invalid in 64-bit mode.)rFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptionsU M M M M M21 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, <strong>and</strong> 1 are reserved. A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefinedflags are U.VirtualException Real 8086 Protected Cause of ExceptionInvalid opcode, #UD X This instruction was executed in 64-bit mode.136 DAA

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