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AMD64 Technology 24594 Rev. 3.10 February 2005Related InstructionsAND, CMPrFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptions0 M M U M 021 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, and 1 are reserved. A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefinedflags are U.Exception RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.General protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.XThe destination operand was in a non-writable segment.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.286 TEST
24594 Rev. 3.10 February 2005 AMD64 TechnologyXADDExchange and AddExchanges the contents of a register (second operand) with the contents of a registeror memory location (first operand), computes the sum of the two values, and stores theresult in the first operand location.The forms of the XADD instruction that write to memory support the LOCK prefix.For details about the LOCK prefix, see “Lock Prefix” on page 10.Mnemonic Opcode DescriptionXADD reg/mem8, reg8 0F C0 /rXADD reg/mem16, reg16 0F C1 /rXADD reg/mem32, reg32 0F C1 /rXADD reg/mem64, reg64 0F C1 /rExchange the contents of an 8-bit register with the contents of an8-bit destination register or memory operand and load their suminto the destination.Exchange the contents of a 16-bit register with the contents of a16-bit destination register or memory operand and load theirsum into the destination.Exchange the contents of a 32-bit register with the contents of a32-bit destination register or memory operand and load theirsum into the destination.Exchange the contents of a 64-bit register with the contents of a64-bit destination register or memory operand and load theirsum into the destination.Related InstructionsNoneXADD 287
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