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AMD64 Technology 24594 Rev. 3.10 February 2005Table D-1.Instruction Subsets and CPUID Feature Sets (continued)InstructionInstruction Subsetand CPUID Feature Set(s) 1Mnemonic Description CPLGeneral-Purpose128-BitMedia64-BitMediax87SystemFLDCWFloating-Point Load x87Control Word3X87FLDENVFloating-Point Load x87Environment3X87FLDL2EFloating-Point LoadLog 2 e3X87FLDL2TFloating-Point LoadLog 2 103X87FLDLG2Floating-Point LoadLog 10 23X87FLDLN2 Floating-Point Load Ln 2 3 X87FLDPI Floating-Point Load Pi 3 X87FLDZ Floating-Point Load +0.0 3 X87FMUL Floating-Point Multiply 3 X87FMULPFloating-Point Multiplyand Pop3X87FNCLEXFloating-Point No-WaitClear Flags3X87FNINITFloating-Point No-WaitInitialize3X87FNOPFloating-Point NoOperation3X87FNSAVESave No-Wait x87 andMMX State3X87X87FNSTCWFloating-Point No-WaitStore x87 Control Word3X87FNSTENVFloating-Point No-WaitStore x87 Environment3X871. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.468 Appendix D: Instruction Subsets and CPUID Feature Sets
24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets and CPUID Feature Sets (continued)FNSTSWFPATANFPREMFPREM1FPTANFRNDINTFRSTORFloating-Point No-WaitStore x87 Status WordFloating-Point PartialArctangentFloating-Point PartialRemainderFloating-Point PartialRemainderFloating-Point PartialTangentFloating-Point Round toIntegerRestore x87 and MMXState3333333FSAVE Save x87 and MMX State 3 X87 X87FSCALE Floating-Point Scale 3 X87FSIN Floating-Point Sine 3 X87FSINCOSFSQRTFSTFSTCWFSTENVInstructionMnemonic Description CPLFloating-Point Sine andCosineFloating-Point SquareRootFloating-Point StoreStack TopFloating-Point Store x87Control WordFloating-Point Store x87Environment33333General-PurposeInstruction Subsetand CPUID Feature Set(s) 1128-BitMedia64-BitMediaX87x87X87X87X87X87X87X87X87X87X87X87X87X87System1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Appendix D: Instruction Subsets and CPUID Feature Sets 469
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