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AMD64 Technology 24594 Rev. 3.10 February 2005NEGTwo’s Complement NegationPerforms the two’s complement negation of the value in the specified register ormemory location by subtracting the value from 0. Use this instruction only on signedinteger numbers.If the value is 0, the instruction clears the CF flag to 0; otherwise, it sets CF to 1. TheOF, SF, ZF, AF, and PF flag settings depend on the result of the operation.The forms of the NEG instruction that write to memory support the LOCK prefix. Fordetails about the LOCK prefix, see “Lock Prefix” on page 10.Mnemonic Opcode DescriptionNEG reg/mem8 F6 /3NEG reg/mem16 F7 /3NEG reg/mem32 F7 /3NEG reg/mem64 F7 /3Performs a two’s complement negation on an 8-bit register ormemory operand.Performs a two’s complement negation on a 16-bit register ormemory operand.Performs a two’s complement negation on a 32-bit register ormemory operand.Performs a two’s complement negation on a 64-bit register ormemory operand.Related InstructionsAND, NOT, OR, XOR212 NEG
24594 Rev. 3.10 February 2005 AMD64 TechnologyrFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptionsM M M M M M21 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, and 1 are reserved. A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefinedflags are U.Exception RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.General protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.XThe destination operand is in a non-writable segment.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.NEG 213
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