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Volume 3: General-Purpose and System Instructions - Stanford ...

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24594 Rev. 3.10 February 2005 AMD64 TechnologysissvwzA scalar doubleword (32-bit) integer oper<strong>and</strong> (scalarinteger).A scalar single-precision floating-point oper<strong>and</strong> (scalarsingle).A word, doubleword, or quadword, depending on theeffective oper<strong>and</strong> size.A word, irrespective of the effective oper<strong>and</strong> size.A word if the effective oper<strong>and</strong> size is 16 bits, or adoubleword if the effective oper<strong>and</strong> size is 32 or 64 bits.A.2 Opcode Encodings/n A ModRM-byte reg field or SIB-byte base field that containsa value (n) between zero (binary 000) <strong>and</strong> 7 (binary 111).For definitions of the mnemonics used to name registers, see“Summary of Registers <strong>and</strong> Data Types” on page 30.A.2.1 One-ByteOpcodesTable A-1 on page 378 shows the one-byte opcodes in which thelow nibble is in the range 0–7h. Table A-2 on page 379 showsthose opcodes in which the low nibble is in the range 8–Fh. Inboth tables, the rows show the full range (0–Fh) of the highnibble, <strong>and</strong> the columns show the specified range of the lownibble.Appendix A: Opcode <strong>and</strong> Oper<strong>and</strong> Encodings 377

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