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AMD64 Technology 24594 Rev. 3.10 February 2005IRET_PROTECTEDELSE // (VIRTUAL_MODE)IRET_VIRTUALIRET_REAL:POP.v temp_RIPPOP.v temp_CSPOP.v temp_RFLAGSIF (temp_RIP > CS.limit)EXCEPTION [#GP(0)]CS.sel = temp_CSCS.base = temp_CS SHL 4RFLAGS.v = temp_RFLAGS // VIF,VIP,VM unchangedRIP = temp_RIPEXITIRET_PROTECTED:IF (RFLAGS.NT=1)// iret does a task-switch to a previous taskIF (LEGACY_MODE)TASK_SWITCH// using the ’back link’ field in the tssELSE// (LONG_MODE)EXCEPTION [#GP(0)] // task switches aren’t supported in long modePOP.v temp_RIPPOP.v temp_CSPOP.v temp_RFLAGSIF ((temp_RFLAGS.VM=1) && (CPL=0) && (LEGACY_MODE))IRET_FROM_PROTECTED_TO_VIRTUALtemp_CPL = temp_CS.rplIF ((64BIT_MODE) || (temp_CPL!=CPL)){POP.v temp_RSP// in 64-bit mode, iret always pops ss:rspPOP.v temp_SS}CS = READ_DESCRIPTOR (temp_CS, iret_chk)IF ((64BIT_MODE) && (temp_RIP is non-canonical)|| (!64BIT_MODE) && (temp_RIP > CS.limit)){EXCEPTION [#GP(0)]310 IRETx
24594 Rev. 3.10 February 2005 AMD64 Technology}CPL = temp_CPLIF ((started in 64-bit mode) || (changing CPL))// ss:rsp were popped, so load them into the registers{SS = READ_DESCRIPTOR (temp_SS, ss_chk)RSP.s = temp_RSP}IF (changing CPL){FOR (seg = ES, DS, FS, GS)IF ((seg.attr.dpl < CPL) && ((seg.attr.type = ’data’)|| (seg.attr.type = ’non-conforming-code’))){seg = NULL // can’t use lower dpl data segment at higher cpl}}RFLAGS.v = temp_RFLAGSRIP = temp_RIPEXIT// VIF,VIP,IOPL only changed if (old_CPL=0)// IF only changed if (old_CPL
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