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Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005Table D-1.Instruction Subsets <strong>and</strong> CPUID Feature Sets (continued)InstructionInstruction Subset<strong>and</strong> CPUID Feature Set(s) 1Mnemonic Description CPL<strong>General</strong>-<strong>Purpose</strong>128-BitMedia64-BitMediax87<strong>System</strong>PFRSQIT1Packed Floating-PointReciprocal Square Root,Iteration 133DNow!PFRSQRTPacked Floating-PointReciprocal Square RootApproximation33DNow!PFSUBPacked Floating-PointSubtract33DNow!PFSUBRPacked Floating-PointSubtract Reverse33DNow!PI2FDPacked Integer toFloating-PointDoubleword Conversion33DNow!PI2FWPacked Integer ToFloating-Point WordConversion33DNow!ExtensionsPINSRW Packed Insert Word 3SSE2SSE, MMXExtensionsPMADDWDPacked Multiply Words<strong>and</strong> Add Doublewords3SSE2MMXPMAXSWPacked MaximumSigned Words3SSE2SSE, MMXExtensionsPMAXUBPacked MaximumUnsigned Bytes3SSE2SSE, MMXExtensionsPMINSWPacked Minimum SignedWords3SSE2SSE, MMXExtensionsPMINUBPacked MinimumUnsigned Bytes3SSE2SSE, MMXExtensionsPMOVMSKB Packed Move Mask Byte 3SSE2SSE, MMXExtensions1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number <strong>and</strong> type of oper<strong>and</strong>s.482 Appendix D: Instruction Subsets <strong>and</strong> CPUID Feature Sets

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