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AMD64 Technology 24594 Rev. 3.10 February 2005// now ((IOPL
24594 Rev. 3.10 February 2005 AMD64 TechnologyES.attr = 16-bit dpl3 dataFS.sel = temp_FSFS.base = temp_FS SHL 4FS.limit= 0x0000FFFFFS.attr = 16-bit dpl3 dataGS.sel = temp_GSGS.base = temp_GS SHL 4GS.limit= 0x0000FFFFGS.attr = 16-bit dpl3 dataRSP.d = temp_RSPRFLAGS.d = temp_RFLAGSCPL = 3RIP = temp_RIP AND 0x0000FFFFEXITRelated InstructionsINT, INTO, INT3rFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFM M M M M M M M M M M M M M M M M21 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, and 1 are reserved. A flag set to one or cleared to zero is M (modified). Unaffected flags are blank. Undefinedflags are U.ExceptionsExceptionSegment not present,#NP (selector)RealVirtual8086 Protected Cause of ExceptionXThe return code segment was marked not present.Stack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.Stack, #SS (selector) X The SS register was loaded with a non-null segment selector and thesegment was marked not present.IRETx 313
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AMD64 Technology 24594 Rev. 3.10 Fe
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AMD64 Technology 24594—Rev. 3.10
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