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Volume 3: General-Purpose and System Instructions - Stanford ...

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24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets <strong>and</strong> CPUID Feature Sets (continued)BSF Bit Scan Forward 3 BasicBSR Bit Scan Reverse 3 BasicBSWAP Byte Swap 3 BasicBT Bit Test 3 BasicBTC Bit Test <strong>and</strong> Complement 3 BasicBTR Bit Test <strong>and</strong> Reset 3 BasicBTS Bit Test <strong>and</strong> Set 3 BasicCALL Procedure Call 3 BasicCBW Convert Byte to Word 3 BasicCDQCDQEConvert Doubleword toQuadwordConvert Doubleword toQuadword33BasicLong ModeCLC Clear Carry Flag 3 BasicCLD Clear Direction Flag 3 BasicCLFLUSH Cache Line Flush 3 CLFLUSHCLI Clear Interrupt Flag 3 BasicCLTSClear Task-Switched Flagin CR0CMC Complement Carry Flag 3 BasicCMOVcc Conditional Move 3 CMOVccCMP Compare 3 BasicCMPPDInstructionMnemonic Description CPLCompare PackedDouble-PrecisionFloating-Point03<strong>General</strong>-<strong>Purpose</strong>Instruction Subset<strong>and</strong> CPUID Feature Set(s) 1128-BitMediaSSE264-BitMedia1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number <strong>and</strong> type of oper<strong>and</strong>s.x87<strong>System</strong>BasicAppendix D: Instruction Subsets <strong>and</strong> CPUID Feature Sets 459

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