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AMD64 Technology 24594 Rev. 3.10 February 2005Related InstructionsNonerFLAGS AffectedNoneExceptionsVirtualException Real 8086 Protected Cause of ExceptionInvalid opcode, #UD X X X The source operand was a register.Segment not present,#NP (selector)XXLDS or LES was executed in 64-bit mode.The DS, ES, FS, or GS register was loaded with a non-null segmentselector and the segment was marked not present.Stack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.Stack, #SS(selector)General protection,#GPXX X XThe SS register was loaded with a non-null segment selector and thesegment was marked not present.A memory address exceeded a data segment limit or was non-canonical.General protection,#GP(selector)XXXXXXXXA null data segment was used to reference memory.A segment register was loaded, but the segment descriptor exceededthe descriptor table limit.A segment register was loaded and the segment selector’s TI bit wasset, but the LDT selector was a null selector.The SS register was loaded with a null segment selector in non-64-bitmode or while CPL = 3.The SS register was loaded and the segment selector RPL and thesegment descriptor DPL were not equal to the CPL.The SS register was loaded and the segment pointed to was not awritable data segment.The DS, ES, FS, or GS register was loaded and the segment pointedto was a data or non-conforming code segment, but the RPL or CPLwas greater than the DPL.The DS, ES, FS, or GS register was loaded and the segment pointedto was not a data segment or readable code segment.180 LxS
24594 Rev. 3.10 February 2005 AMD64 TechnologyExceptionRealVirtual8086 Protected Cause of ExceptionPage fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.LxS 181
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