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AMD64 Technology 24594 Rev. 3.10 February 2005Mnemonic Opcode DescriptionXOR reg/mem32, imm32XOR reg/mem64, imm32XOR reg/mem16, imm8XOR reg/mem32, imm8XOR reg/mem64, imm881 /6 id81 /6 id83 /6 ib83 /6 ib83 /6 ibXOR the contents of a 32-bit destination register or memoryoperand with a 32-bit immediate value and store the result in thedestination.XOR the contents of a 64-bit destination register or memoryoperand with a sign-extended 32-bit immediate value and storethe result in the destination.XOR the contents of a 16-bit destination register or memoryoperand with a sign-extended 8-bit immediate value and storethe result in the destination.XOR the contents of a 32-bit destination register or memoryoperand with a sign-extended 8-bit immediate value and storethe result in the destination.XOR the contents of a 64-bit destination register or memoryoperand with a sign-extended 8-bit immediate value and storethe result in the destination.XOR reg/mem8, reg8 30 /rXOR reg/mem16, reg16 31 /rXOR reg/mem32, reg32 31 /rXOR reg/mem64, reg64 31 /rXOR reg8, reg/mem8 32 /rXOR reg16, reg/mem16 33 /rXOR reg32, reg/mem32 33 /rXOR reg64, reg/mem64 33 /rXOR the contents of an 8-bit destination register or memoryoperand with the contents of an 8-bit register and store the resultin the destination.XOR the contents of a 16-bit destination register or memoryoperand with the contents of a 16-bit register and store the resultin the destination.XOR the contents of a 32-bit destination register or memoryoperand with the contents of a 32-bit register and store the resultin the destination.XOR the contents of a 64-bit destination register or memoryoperand with the contents of a 64-bit register and store the resultin the destination.XOR the contents of an 8-bit destination register with thecontents of an 8-bit register or memory operand and store theresults in the destination.XOR the contents of a 16-bit destination register with the contentsof a 16-bit register or memory operand and store the results inthe destination.XOR the contents of a 32-bit destination register with thecontents of a 32-bit register or memory operand and store theresults in the destination.XOR the contents of a 64-bit destination register with thecontents of a 64-bit register or memory operand and store theresults in the destination.294 XOR
24594 Rev. 3.10 February 2005 AMD64 TechnologyRelated InstructionsOR, AND, NOT, NEGrFLAGS AffectedID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptions0 M M U M 021 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, and 1 are reserved. A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefinedflags are U.Exception RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.General protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.XThe destination operand was in a non-writable segment.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.XOR 295
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