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AMD64 Technology 24594 Rev. 3.10 February 2005Table D-1.Instruction Subsets and CPUID Feature Sets (continued)InstructionInstruction Subsetand CPUID Feature Set(s) 1Mnemonic Description CPLGeneral-Purpose128-BitMedia64-BitMediax87SystemCVTPS2PDConvert Packed Single-Precision Floating-Pointto Packed Double-Precision Floating-Point3SSE2CVTPS2PIConvert Packed Single-Precision Floating-Pointto Packed DoublewordIntegers3SSESSECVTSD2SIConvert Scalar Double-Precision Floating-Pointto Signed Doublewordor Quadword Integer3SSE2CVTSD2SSConvert Scalar Double-Precision Floating-Pointto Scalar Single-PrecisionFloating-Point3SSE2CVTSI2SDConvert SignedDoubleword orQuadword Integer toScalar Double-PrecisionFloating-Point3SSE2CVTSI2SSConvert SignedDoubleword orQuadword Integer toScalar Single-PrecisionFloating-Point3SSECVTSS2SDConvert Scalar Single-Precision Floating-Pointto Scalar Double-Precision Floating-Point3SSE21. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.462 Appendix D: Instruction Subsets and CPUID Feature Sets
24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets and CPUID Feature Sets (continued)InstructionInstruction Subsetand CPUID Feature Set(s) 1Mnemonic Description CPLGeneral-Purpose128-BitMedia64-BitMediax87SystemCVTSS2SIConvert Scalar Single-Precision Floating-Pointto Signed Doublewordor Quadword Integer3SSECVTTPD2DQConvert Packed Double-Precision Floating-Pointto Packed DoublewordIntegers, Truncated3SSE2CVTTPD2PIConvert Packed Double-Precision Floating-Pointto Packed DoublewordIntegers, Truncated3SSE2SSE2CVTTPS2DQConvert Packed Single-Precision Floating-Pointto Packed DoublewordIntegers, Truncated3SSE2CVTTPS2PIConvert Packed Single-Precision Floating-Pointto Packed DoublewordIntegers, Truncated3SSESSECVTTSD2SIConvert Scalar Double-Precision Floating-Pointto Signed Doublewordor Quadword Integer,Truncated3SSE2CVTTSS2SIConvert Scalar Single-Precision Floating-Pointto Signed Doublewordor Quadword Integer,Truncated3SSECWDConvert Word toDoubleword3Basic1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Appendix D: Instruction Subsets and CPUID Feature Sets 463
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