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Volume 3: General-Purpose and System Instructions - Stanford ...

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24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets <strong>and</strong> CPUID Feature Sets (continued)InstructionInstruction Subset<strong>and</strong> CPUID Feature Set(s) 1Mnemonic Description CPL<strong>General</strong>-<strong>Purpose</strong>128-BitMedia64-BitMediax87<strong>System</strong>CVTDQ2PDConvert PackedDoubleword Integers toPacked Double-PrecisionFloating-Point3SSE2CVTDQ2PSConvert PackedDoubleword Integers toPacked Single-PrecisionFloating-Point3SSE2CVTPD2DQConvert Packed Double-Precision Floating-Pointto Packed DoublewordIntegers3SSE2CVTPD2PIConvert Packed Double-Precision Floating-Pointto Packed DoublewordIntegers3SSE2SSE2CVTPD2PSConvert Packed Double-Precision Floating-Pointto Packed Single-Precision Floating-Point3SSE2CVTPI2PDConvert PackedDoubleword Integers toPacked Double-PrecisionFloating-Point3SSE2SSE2CVTPI2PSConvert PackedDoubleword Integers toPacked Single-PrecisionFloating-Point3SSESSECVTPS2DQConvert Packed Single-Precision Floating-Pointto Packed DoublewordIntegers3SSE21. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number <strong>and</strong> type of oper<strong>and</strong>s.Appendix D: Instruction Subsets <strong>and</strong> CPUID Feature Sets 461

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