Volume 3: General-Purpose and System Instructions - Stanford ...

24594 Rev. 3.10 February 2005 AMD64 TechnologyTable D-1.Instruction Subsets and CPUID Feature Sets (continued)LDS Load DS Far Pointer 3 BasicLEA Load Effective Address 3 BasicLEAVEDelete Procedure StackFrame3BasicLES Load ES Far Pointer 3 BasicLFENCE Load Fence 3 SSE2LFS Load FS Far Pointer 3 BasicLGDTLoad Global DescriptorTable RegisterLGS Load GS Far Pointer 3 BasicLIDTLLDTLMSWInstructionMnemonic Description CPLLoad InterruptDescriptor Table RegisterLoad Local DescriptorTable RegisterLoad Machine StatusWordLODS Load String 3 BasicLODSB Load String Byte 3 BasicLODSD Load String Doubleword 3 BasicLODSQ Load String Quadword 3 Long ModeLODSW Load String Word 3 BasicLOOP Loop 3 BasicLOOPE Loop if Equal 3 BasicLOOPNE Loop if Not Equal 3 BasicLOOPNZ Loop if Not Zero 3 Basic0000General-PurposeInstruction Subsetand CPUID Feature Set(s) 1128-BitMedia64-BitMediax87SystemBasicBasicBasicBasic1. Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Appendix D: Instruction Subsets and CPUID Feature Sets 473