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Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005Mnemonic Opcode DescriptionSCASBSCASWSCASDSCASQRelated <strong>Instructions</strong>CMP, CMPSxrFLAGS AffectedAEAFAFAFCompare the contents of the AL register with the byte at ES:rDI,<strong>and</strong> then increment or decrement rDI.Compare the contents of the AX register with the word at ES:rDI,<strong>and</strong> then increment or decrement rDI.Compare the contents of the EAX register with the doubleword atES:rDI, <strong>and</strong> then increment or decrement rDI.Compare the contents of the RAX register with the quadword atES:rDI, <strong>and</strong> then increment or decrement rDI.ID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CFExceptionsM M M M M M21 20 19 18 17 16 14 13–12 11 10 9 8 7 6 4 2 0Note: Bits 31–22, 15, 5, 3, <strong>and</strong> 1 are reserved. A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefinedflags are U.Exception<strong>General</strong> protection,#GPRealXVirtual8086 Protected Cause of ExceptionXXXA null ES segment was used to reference memory.A memory address exceeded the ES segment limit or was non-canonical.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.266 SCASx

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