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AMD64 Technology 24594 Rev. 3.10 February 2005LIDTLoad Interrupt Descriptor Table RegisterLoads the pseudo-descriptor specified by the source operand into the interruptdescriptor table register (IDTR). The pseudo-descriptor is a memory locationcontaining the IDTR base and limit. In legacy and compatibility mode, the pseudodescriptoris six bytes; in 64-bit mode, it is 10 bytes.If the operand size is 16 bits, the high-order byte of the 6-byte pseudo-descriptor is notused. The lower two bytes specify the 16-bit limit and the third, fourth, and fifth bytesspecify the 24-bit base address. The high-order byte of the IDTR is filled with zeros.If the operand size is 32 bits, the lower two bytes specify the 16-bit limit and the upperfour bytes specify a 32-bit base address.In 64-bit mode, the lower two bytes specify the 16-bit limit, and the upper eight bytesspecify a 64-bit base address. In 64-bit mode, operand-size prefixes are ignored andthe operand size is forced to 64-bits; therefore, the pseudo-descriptor is always 10bytes.This instruction is only used in operating system software and must be executed atCPL 0. It is normally executed once in real mode to initialize the processor beforeswitching to protected mode.LIDT is a serializing instruction.Mnemonic Opcode DescriptionLIDT mem16:32 0F 01 /3 Loads mem16:32 into the interrupt descriptor table register.LIDT mem16:64 0F 01 /3 Loads mem16:64 into the interrupt descriptor table register.Related InstructionsLGDT, LLDT, LTR, SGDT, SIDT, SLDT, STRrFLAGS AffectedNone320 LIDT
24594 Rev. 3.10 February 2005 AMD64 TechnologyExceptionsException RealVirtual8086 Protected Cause of ExceptionInvalid opcode, #UD X X X The operand was a register.Stack, #SS X X A memory address exceeded the stack segment limit or was noncanonical.General protection, #GP XX A memory address exceeded the data segment limit or was noncanonical.XXXCPL was not 0.The new IDT base address was non-canonical.X A null data segment was used to reference memory.Page fault, #PF X A page fault resulted from the execution of the instruction.LIDT 321
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