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Volume 3: General-Purpose and System Instructions - Stanford ...

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AMD64 Technology 24594 Rev. 3.10 February 2005Mnemonic Opcode DescriptionLODS mem64ADLoad quadword at DS:rSI into RAX <strong>and</strong> then increment ordecrement rSI.LODSB AC Load byte at DS:rSI into AL <strong>and</strong> then increment or decrement rSI.LODSWLODSDLODSQRelated <strong>Instructions</strong>MOVSx, STOSxrFLAGS AffectedNoneExceptionsADADADLoad the word at DS:rSI into AX <strong>and</strong> then increment ordecrement rSI.Load doubleword at DS:rSI into EAX <strong>and</strong> then increment ordecrement rSI.Load quadword at DS:rSI into RAX <strong>and</strong> then increment ordecrement rSI.Exception RealVirtual8086 Protected Cause of ExceptionStack, #SS X X X A memory address exceeded the stack segment limit or was noncanonical.<strong>General</strong> protection,#GPX X XA memory address exceeded a data segment limit or was non-canonical.X A null data segment was used to reference memory.Page fault, #PF X X A page fault resulted from the execution of the instruction.Alignment check, #AC X X An unaligned memory reference was performed while alignmentchecking was enabled.188 LODSx

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