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Configuring Hardware and Communication Connections STEP 7.pdf

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<strong>Configuring</strong> the Distributed I/O (DP)<br />

Process Reaction Times with Constant Bus Cycle Time <strong>and</strong> Clock<br />

Synchronization<br />

SIMATIC produces reproducible (that is, repeatable, of equal length) reaction times<br />

by means of a constant (isochrone) DP bus cycle <strong>and</strong> synchronization of the<br />

individual cycles previously listed.<br />

In this case, the situation corresponds to the example given above with the<br />

difference that all cycles (up to the OB 1 cycle) are of equal length <strong>and</strong><br />

synchronously cycled. The clock pulse generator is comprised of the DP master<br />

constant bus cycle time clock that is sent as the global control frame to the DP<br />

slaves. A synchronous cycle interrupt OB 61 (or OB 61 to OB 64) ensures that it<br />

is synchronized with the user program.<br />

<strong>Configuring</strong> <strong>Hardware</strong> <strong>and</strong> <strong>Communication</strong> <strong>Connections</strong> with <strong>STEP</strong> 7<br />

3-84 A5E00706939-01

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