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M16C/62 Group DATASHEET

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Serial I/OMitsubishi microcomputers<strong>M16C</strong> / <strong>62</strong> <strong>Group</strong>SINGLE-CHIP 16-BIT CMOS MICROCOMPUTERSerial I/OSerial I/O is configured as five channels: UART0, UART1, UART2, S I/O3 and S I/O4.UART0 to 2UART0, UART1 and UART2 each have an exclusive timer to generate a transfer clock, so they operateindependently of each other.Figure 1.19.1 shows the block diagram of UART0, UART1 and UART2. Figures 1.19.2 and 1.19.3 showthe block diagram of the transmit/receive unit.UARTi (i = 0 to 2) has two operation modes: a clock synchronous serial I/O mode and a clock asynchronousserial I/O mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses03A016, 03A816 and 037816) determine whether UARTi is used as a clock synchronous serial I/O or as aUART. Although a few functions are different, UART0, UART1 and UART2 have almost the same functions.UART2, in particular, is used for the SIM interface with some extra settings added in clock-asynchronousserial I/O mode (Note). It also has the bus collision detection function that generates an interrupt request ifthe TxD pin and the RxD pin are different in level.Table 1.19.1 shows the comparison of functions of UART0 through UART2, and Figures 1.19.4 to 1.19.8show the registers related to UARTi.Note: SIM : Subscriber Identity ModuleTable 1.19.1. Comparison of functions of UART0 through UART2FunctionUART0 UART1 UART2CLK polarity selectionPossible (Note 1)Possible (Note 1)Possible (Note 1)LSB first / MSB first selectionPossible (Note 1)Possible (Note 1)Possible (Note 2)Continuous receive mode selectionPossible (Note 1)Possible (Note 1)Possible (Note 1)Transfer clock output from multiplepins selectionImpossiblePossible (Note 1)ImpossibleSeparate CTS/RTS pinsPossibleImpossibleImpossibleSerial data logic switchImpossibleImpossiblePossible (Note 4)Sleep mode selectionPossible (Note 3)Possible (Note 3)ImpossibleTxD, RxD I/O polarity switch ImpossibleImpossible PossibleTxD, RxD port output formatCMOS outputCMOS outputN-channel open-drainoutputParity error signal outputImpossibleImpossiblePossible (Note 4)Bus collision detection ImpossibleImpossible PossibleNote 1: Only when clock synchronous serial I/O mode.Note 2: Only when clock synchronous serial I/O mode and 8-bit UART mode.Note 3: Only when UART mode.Note 4: Using for SIM interface.112

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