M16C/62 Group DATASHEET

UART2 Special Mode RegisterMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERUART2 Special Mode RegisterThe UART2 special mode register (address 037716) is used to control UART2 in various ways.Figure 1.19.26 shows the UART2 special mode register.UART2 special mode registerb7 b6 b5 b4 b3 b2 b1 b00Symbol Address When resetU2SMR 037716 0016BitsymbolIICMABCBBSLSYNABSCSACSESSSBit nameI 2C mode selection bitArbitration lost detectingflag control bitBus busy flagSCLL sync outputenable bitBus collision detectsampling clock select bitAuto clear functionselect bit of transmitenable bitTransmit start conditionselect bitNote: Nothing but "0" may be written.Function(During clock synchronousserial I/O mode)0 : Normal mode1 : I 2C mode0 : Update per bit1 : Update per byte0 : STOP condition detected1 : START condition detected0 : Disabled1 : EnabledMust always be “0”Must always be “0”Must always be “0”Reserved bit Always set to “0”Function(During UART mode)Must always be “0”Must always be “0”Must always be “0”Must always be “0”0 : Rising edge of transferclock1 : Underflow signal of timer A00 : No auto clear function1 : Auto clear at occurrence ofbus collision0 : Ordinary1 : Falling edge of RxD2R W(Note)Figure 1.19.26. UART2 special mode registerTable 1.19.9. Features in I 2 C mode12345678Function Normal mode I 2 C mode (Note 1)Factor of interrupt number 10 (Note 2)Bus collision detectionStart condition detection or stopcondition detectionFactor of interrupt number 15 (Note 2) UART2 transmission No acknowledgment detection (NACK)Factor of interrupt number 16 (Note 2)UART2 receptionAcknowledgment detection (ACK)UART2 transmission output delay Not delayed DelayedP70 at the time when UART2 is in use TxD2 (output) SDA (input/output) (Note 3)P71 at the time when UART2 is in use RxD2 (input) SCL (input/output)P72 at the time when UART2 is in use CLK2 P72DMA1 factor at the time when 1 1 0 1 is assignedto the DMA request factor selection bitsUART2 receptionAcknowledgment detection (ACK)91011Noise filter width 15ns 50nsReading P71Initial value of UART2 outputReading the terminal when 0 isassigned to the direction registerH level (when 0 is assigned tothe CLK polarity select bit)Reading the terminal regardless of thevalue of the direction registerThe value set in latch P70 when the port isselectedNote 1: Make the settings given below when I 2 C mode is in use.Set 0 1 0 in bits 2, 1, 0 of the UART2 transmission/reception mode register.Disable the RTS/CTS function. Choose the MSB First function.Note 2: Follow the steps given below to switch from a factor to another.1. Disable the interrupt of the corresponding number.2. Switch from a factor to another.3. Reset the interrupt request flag of the corresponding number.4. Set an interrupt level of the corresponding number.Note 3: Set an initial value of SDA transmission output when serial I/O is invalid.140