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M16C/62 Group DATASHEET

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InterruptMitsubishi microcomputers<strong>M16C</strong> / <strong>62</strong> <strong>Group</strong>SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER• Variable vector tablesThe addresses in the variable vector table can be modified, according to the user’s settings. Indicatethe first address using the interrupt table register (INTB). The 256-byte area subsequent to the addressthe INTB indicates becomes the area for the variable vector tables. One vector table comprisesfour bytes. Set the first address of the interrupt routine in each vector table. Table 1.14.2 shows theinterrupts assigned to the variable vector tables and addresses of vector tables.Table 1.14.2. Interrupts assigned to the variable vector tables and addresses of vector tablesSoftware interrupt numberVector table addressAddress (L) to address (H)Interrupt sourceRemarksSoftware interrupt number 0+0 to +3 (Note 1) BRK instructionCannot be masked I flagSoftware interrupt number 4Software interrupt number 5Software interrupt number 6Software interrupt number 7Software interrupt number 8Software interrupt number 9Software interrupt number 10Software interrupt number 11Software interrupt number 12Software interrupt number 13Software interrupt number 14Software interrupt number 15Software interrupt number 16Software interrupt number 17Software interrupt number 18Software interrupt number 19Software interrupt number 20Software interrupt number 21Software interrupt number 22Software interrupt number 23Software interrupt number 24Software interrupt number 25Software interrupt number 26Software interrupt number 27Software interrupt number 28Software interrupt number 29Software interrupt number 30Software interrupt number 31Software interrupt number 32toSoftware interrupt number 63+16 to +19 (Note 1) INT3+20 to +23 (Note 1)+24 to +27 (Note 1)+28 to +31 (Note 1)+32 to +35 (Note 1)+36 to +39 (Note 1) SI/O3/INT4 (Note 2)+40 to +43 (Note 1) Bus collision detection+44 to +47 (Note 1) DMA0+48 to +51 (Note 1)+52 to +55 (Note 1)+56 to +59 (Note 1)+60 to +63 (Note 1)+64 to +67 (Note 1)+68 to +71 (Note 1)+72 to +75 (Note 1)+76 to +79 (Note 1)+80 to +83 (Note 1)+84 to +87 (Note 1)+88 to +91 (Note 1)+92 to +95 (Note 1)+96 to +99 (Note 1)+100 to +103 (Note 1)+104 to +107 (Note 1)+108 to +111 (Note 1)+112 to +115 (Note 1)+116 to +119 (Note 1)+120 to +123 (Note 1)+124 to +127 (Note 1)+128 to +131 (Note 1)to+252 to +255 (Note 1)Timer B5Timer B4Timer B3SI/O4/INT5(Note 2)DMA1Key input interruptA-DUART2 transmit/NACK (Note 3)UART2 receive/ACK (Note 3)UART0 transmitUART0 receiveUART1 transmitUART1 receiveTimer A0Timer A1Timer A2Timer A3Timer A4Timer B0Timer B1Timer B2INT0INT1INT2Software interruptNote 1: Address relative to address in interrupt table register (INTB).Note 2: It is selected by interrupt request cause bit (bit 6, 7 in address 035F16 ).Note 3: When IIC mode is selected, NACK and ACK interrupts are selected.Cannot be masked I flag54

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