M16C/62 Group DATASHEET

UART2 Special Mode RegisterMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERThe acknowledgment non-detection interrupt refers to the interrupt that occurs when the SDA terminallevel is detected still staying “H” at the rising edge of the 9th transmission clock. The acknowledgmentdetection interrupt refers to the interrupt that occurs when SDA terminal’s level is detected already wentto “L” at the 9th transmission clock. Also, assigning 1 1 0 1 (UART2 reception) to the DMA1 request factorselect bits provides the means to start up the DMA transfer by the effect of acknowledgment detection.Bit 1 of the UART2 special mode register (037716) is used as the arbitration loss detecting flag control bit.Arbitration means the act of detecting the nonconformity between transmission data and SDA terminaldata at the timing of the SCL rising edge. This detecting flag is located at bit 3 of the UART2 receptionbuffer register (037F16), and “1” is set in this flag when nonconformity is detected. Use the arbitration lostdetecting flag control bit to choose which way to use to update the flag, bit by bit or byte by byte. Whensetting this bit to “1” and updated the flag byte by byte if nonconformity is detected, the arbitration lostdetecting flag is set to “1” at the falling edge of the 9th transmission clock.If update the flag byte by byte, must judge and clear (“0”) the arbitration lost detecting flag after completingthe first byte acknowledge detect and before starting the next one byte transmission.Bit 3 of the UART2 special mode register is used as SCL- and L-synchronous output enable bit. Settingthis bit to “1” goes the P71 data register to “0” in synchronization with the SCL terminal level going to “L”.142