M16C/62 Group DATASHEET

InterruptMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTERInterrupt SequenceAn interrupt sequence — what are performed over a period from the instant an interrupt is accepted to theinstant the interrupt routine is executed — is described here.If an interrupt occurs during execution of an instruction, the processor determines its priority when theexecution of the instruction is completed, and transfers control to the interrupt sequence from the nextcycle. If an interrupt occurs during execution of either the SMOVB, SMOVF, SSTR or RMPA instruction,the processor temporarily suspends the instruction being executed, and transfers control to the interruptsequence.In the interrupt sequence, the processor carries out the following in sequence given:(1) CPU gets the interrupt information (the interrupt number and interrupt request level) by reading address0000016. After this, the corresponding interrupt request bit becomes “0”.(2) Saves the content of the flag register (FLG) as it was immediately before the start of interrupt sequencein the temporary register (Note) within the CPU.(3) Sets the interrupt enable flag (I flag), the debug flag (D flag), and the stack pointer select flag (U flag) to“0” (the U flag, however does not change if the INT instruction, in software interrupt numbers 32through 63, is executed)(4) Saves the content of the temporary register (Note) within the CPU in the stack area.(5) Saves the content of the program counter (PC) in the stack area.(6) Sets the interrupt priority level of the accepted instruction in the IPL.After the interrupt sequence is completed, the processor resumes executing instructions from the firstaddress of the interrupt routine.Note: This register cannot be utilized by the user.Interrupt Response Time'Interrupt response time' is the period between the instant an interrupt occurs and the instant the firstinstruction within the interrupt routine has been executed. This time comprises the period from theoccurrence of an interrupt to the completion of the instruction under execution at that moment (a) and thetime required for executing the interrupt sequence (b). Figure 1.14.4 shows the interrupt response time.Interrupt request generatedInterrupt request acknowledgedTimeInstruction(a)Interrupt sequence(b)Instruction ininterrupt routineInterrupt response time(a) Time from interrupt request is generated to when the instruction then under execution is completed.(b) Time in which the instruction sequence is executed.Figure 1.14.4. Interrupt response time59