M16C/62 Group DATASHEET

SFRMitsubishi microcomputersM16C / 62 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTER034016034116034216034316034416034516Timer B3, 4, 5 count start flag (TBSR)Timer A1-1 register (TA11)Timer A2-1 register (TA21)038016038116038216038316038416038516Count start flag (TABSR)Clock prescaler reset flag (CPSRF)One-shot start flag (ONSF)Trigger select register (TRGSR)Up-down flag (UDF)034616034716034816034916034A16034B16034C16034D16Timer A4-1 register (TA41)Three-phase PWM control register 0(INVC0)Three-phase PWM control register 1(INVC1)Three-phase output buffer register 0(IDB0)Three-phase output buffer register 1(IDB1)Dead time timer(DTT)Timer B2 interrupt occurrence frequency set counter(ICTB2)038616038716038816038916038A16038B16038C16038D16Timer A0 (TA0)Timer A1 (TA1)Timer A2 (TA2)Timer A3 (TA3)034E16034F16038E16038F16Timer A4 (TA4)035016035116Timer B3 register (TB3)039016039116Timer B0 (TB0)035216035316Timer B4 register (TB4)039216039316Timer B1 (TB1)035416035516035616035716035816035916035A16035B16035C16035D16035E16035F16036016036116036216036316036416036516036616036716036816036916036A16036B16036C16036D16036E16036F16037016037116037216037316037416037516037616037716037816037916037A16037B16037C16037D16037E16037F16Timer B5 register (TB5)Timer B3 mode register (TB3MR)Timer B4 mode register (TB4MR)Timer B5 mode register (TB5MR)Interrupt cause select register (IFSR)SI/O3 transmit/receive register (S3TRR)SI/O3 control register (S3C)SI/O3 bit rate generator (S3BRG)SI/O4 transmit/receive register (S4TRR)SI/O4 control register (S4C)SI/O4 bit rate generator (S4BRG)UART2 special mode register 2(U2SMR2)UART2 special mode register (U2SMR)UART2 transmit/receive mode register (U2MR)UART2 bit rate generator (U2BRG)UART2 transmit buffer register (U2TB)UART2 transmit/receive control register 0 (U2C0)UART2 transmit/receive control register 1 (U2C1)UART2 receive buffer register (U2RB)039416039516039616039716039816039916039A16039B16039C16039D16039E16039F1603A01603A11603A21603A31603A41603A51603A61603A71603A81603A91603AA1603AB1603AC1603AD1603AE1603AF1603B01603B11603B21603B31603B41603B51603B61603B71603B81603B91603BA1603BB1603BC1603BD1603BE1603BF16Timer B2 (TB2)Timer A0 mode register (TA0MR)Timer A1 mode register (TA1MR)Timer A2 mode register (TA2MR)Timer A3 mode register (TA3MR)Timer A4 mode register (TA4MR)Timer B0 mode register (TB0MR)Timer B1 mode register (TB1MR)Timer B2 mode register (TB2MR)UART0 transmit/receive mode register (U0MR)UART0 bit rate generator (U0BRG)UART0 transmit buffer register (U0TB)UART0 transmit/receive control register 0 (U0C0)UART0 transmit/receive control register 1 (U0C1)UART0 receive buffer register (U0RB)UART1 transmit/receive mode register (U1MR)UART1 bit rate generator (U1BRG)UART1 transmit buffer register (U1TB)UART1 transmit/receive control register 0 (U1C0)UART1 transmit/receive control register 1 (U1C1)UART1 receive buffer register (U1RB)UART transmit/receive control register 2 (UCON)Flash memory control register 1 (FMR1) (Note1)Flash memory control register 0 (FMR0) (Note1)DMA0 request cause select register (DM0SL)DMA1 request cause select register (DM1SL)CRC data register (CRCD)CRC input register (CRCIN)Note 1: This register is only exist in flash memory version.Note 2: Locations in the SFR area where nothing is allocated are reserved areas. Do not access these areas forread or write.Figure 1.7.2. Location of peripheral unit control registers (2)19